Raghavendra Kulkarni

According to our database1, Raghavendra Kulkarni authored at least 8 papers between 2010 and 2017.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
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Links

On csauthors.net:

Bibliography

2017
An 802.11a/b/g/n/ac WLAN Transceiver for 2×2 MIMO and Simultaneous Dual-Band Operation With +29 dBm P<sub>sat</sub> Integrated Power Amplifiers.
IEEE J. Solid State Circuits, 2017

2016
An 802.11a/b/g/n/ac WLAN Transceiver for 2×2 MIMO and simultaneous dual-band operation with +29 dBm Psat integrated power amplifiers.
Proceedings of the ESSCIRC Conference 2016: 42<sup>nd</sup> European Solid-State Circuits Conference, 2016

2013
A Bang-Bang Clock and Data Recovery Using Mixed Mode Adaptive Loop Gain Strategy.
IEEE J. Solid State Circuits, June, 2013

A 1.5 ns OFF/ON Switching-Time Voltage-Mode LVDS Driver/Receiver Pair for Asynchronous AER Bit-Serial Chip Grid Links With Up to 40 Times Event-Rate Dependent Power Savings.
IEEE Trans. Biomed. Circuits Syst., 2013

2012
UHF Receiver Front-End: Implementation and Analog Baseband Design Considerations.
IEEE Trans. Very Large Scale Integr. Syst., 2012

A Self-Sustained CMOS Microwave Chemical Sensor Using a Frequency Synthesizer.
IEEE J. Solid State Circuits, 2012

2011
Voltage mode driver for low power transmission of high speed serial AER Links.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2011), 2011

2010
A broadband 470-862 MHz direct conversion CMOS receiver.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010


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