Rafael Ubal
According to our database1,
Rafael Ubal
authored at least 28 papers
between 2006 and 2019.
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On csauthors.net:
Bibliography
2019
Proceedings of the 46th International Symposium on Computer Architecture, 2019
2018
2017
Proceedings of the 2017 IEEE International Symposium on Performance Analysis of Systems and Software, 2017
Proceedings of the Euro-Par 2017: Parallel Processing - 23rd International Conference on Parallel and Distributed Computing, Santiago de Compostela, Spain, August 28, 2017
Proceedings of the 2017 International Symposium on Code Generation and Optimization, 2017
2016
UMH: A Hardware-Based Unified Memory Hierarchy for Systems with Multiple Discrete GPUs.
ACM Trans. Archit. Code Optim., 2016
2015
Proceedings of the Workshop on Computer Architecture Education, 2015
Proceedings of the 3rd International Workshop on OpenCL, 2015
Proceedings of the 29th ACM on International Conference on Supercomputing, 2015
2014
IEEE Trans. Very Large Scale Integr. Syst., 2014
Proceedings of the 51st Annual Design Automation Conference 2014, 2014
2013
Hardware-Based Generation of Independent Subtraces of Instructions in Clustered Processors.
IEEE Trans. Computers, 2013
2012
A Sequentially Consistent Multiprocessor Architecture for Out-of-Order Retirement of Instructions.
IEEE Trans. Parallel Distributed Syst., 2012
Page-Based Memory Allocation Policies of Local and Remote Memory in Cluster Computers.
Proceedings of the 18th IEEE International Conference on Parallel and Distributed Systems, 2012
Proceedings of the International Conference on Parallel Architectures and Compilation Techniques, 2012
2010
Proceedings of the 28th International Conference on Computer Design, 2010
Proceedings of the 19th International Conference on Parallel Architectures and Compilation Techniques, 2010
2009
IEEE Trans. Computers, 2009
Intell. Autom. Soft Comput., 2009
Proceedings of the 27th International Conference on Computer Design, 2009
Proceedings of the Euro-Par 2009 Parallel Processing, 2009
An Efficient Low-Complexity Alternative to the ROB for Out-of-Order Retirement of Instructions.
Proceedings of the 12th Euromicro Conference on Digital System Design, 2009
2008
The impact of out-of-order commit in coarse-grain, fine-grain and simultaneous multithreaded architectures.
Proceedings of the 22nd IEEE International Symposium on Parallel and Distributed Processing, 2008
2007
Proceedings of the 19th Symposium on Computer Architecture and High Performance Computing (SBAC-PAD 2007), 2007
Proceedings of the 2007 International Conference on Intelligent Pervasive Computing, 2007
VB-MT: Design Issues and Performance of the Validation Buffer Microarchitecture for Multithreaded Processors.
Proceedings of the 16th International Conference on Parallel Architectures and Compilation Techniques (PACT 2007), 2007
2006
RACFP: a training tool to work with floating-point representation, algorithms, and circuits in undergraduate courses.
IEEE Trans. Educ., 2006
Proceedings of the 18th Symposium on Computer Architecture and High Performance Computing (SBAC-PAD 2006), 2006