Rafael Reif
Affiliations:- Massachusetts Institute of Technology, Cambridge, USA
According to our database1,
Rafael Reif
authored at least 11 papers
between 2000 and 2005.
Collaborative distances:
Collaborative distances:
Awards
IEEE Fellow
IEEE Fellow 1993, "For pioneering work in the low-temperature epitaxial growth of semiconductor thin films.".
Timeline
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Bibliography
2005
Substrate noise analysis and experimental verification for the efficient noise prediction of a digital PLL.
Proceedings of the IEEE 2005 Custom Integrated Circuits Conference, 2005
2004
IEEE Trans. Very Large Scale Integr. Syst., 2004
Technology, performance, and computer-aided design of three-dimensional integrated circuits.
Proceedings of the 2004 International Symposium on Physical Design, 2004
Proceedings of the 14th ACM Great Lakes Symposium on VLSI 2004, 2004
2003
Wiring requirement and three-dimensional integration technology for field programmable gate arrays.
IEEE Trans. Very Large Scale Integr. Syst., 2003
Three-Dimensional Integrated Circuits: Performance, Design Methodology, and CAD Tools.
Proceedings of the 2003 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2003), 2003
Proceedings of the 2003 Asia and South Pacific Design Automation Conference, 2003
2002
Proceedings of the 3rd International Symposium on Quality of Electronic Design, 2002
2001
Proc. IEEE, 2001
Wiring requirement and three-dimensional integration of field-programmable gate arrays.
Proceedings of the Third IEEE/ACM International Workshop on System-Level Interconnect Prediction (SLIP 2001), March 31, 2001
2000
IEEE Trans. Very Large Scale Integr. Syst., 2000