Rafael Kioji Vivas Maeda

According to our database, Rafael Kioji Vivas Maeda authored at least 23 papers between 2014 and 2022.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2022

Fast and Accurate Statistical Simulation of Shared-Memory Applications on Multicore Systems.

Fan Jiang, Rafael K. V. Maeda, Jun Feng, Shixi Chen, Lin Chen, Xiao Li, Jiang Xu

IEEE Trans. Parallel Distributed Syst., 2022

2020

Multidevice Collaborative Power Management Through Decentralized Knowledge Sharing.

Zhongyuan Tian, Jiang Xu, Haoran Li, Rafael Kioji Vivas Maeda

IEEE Trans. Very Large Scale Integr. Syst., 2020

Chip-Specific Power Delivery and Consumption Co-Management for Process-Variation-Aware Manycore Systems Using Reinforcement Learning.

Haoran Li, Zhongyuan Tian, Jiang Xu, Rafael K. V. Maeda, Zhehui Wang, Zhifei Wang

IEEE Trans. Very Large Scale Integr. Syst., 2020

Multidomain Inter/Intrachip Silicon Photonic Networks for Energy-Efficient Rack-Scale Computing Systems.

Peng Yang, Zhehui Wang, Zhifei Wang, Jiang Xu, Yi-Shing Chang, Xuanqi Chen, Rafael K. V. Maeda, Jun Feng

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020

2019

Collaborative Power Management Through Knowledge Sharing Among Multiple Devices.

Zhongyuan Tian, Zhe Wang, Jiang Xu, Haoran Li, Peng Yang, Rafael Kioji Vivas Maeda

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2019

2018

Workload-Aware Adaptive Power Delivery System Management for Many-Core Processors.

Haoran Li, Jiang Xu, Zhe Wang, Rafael K. V. Maeda, Peng Yang, Zhongyuan Tian

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2018

Decentralized Collaborative Power Management through Multi-Device Knowledge Sharing.

Zhongyuan Tian, Haoran Li, Rafael Kioji Vivas Maeda, Jun Feng, Jiang Xu

Proceedings of the 36th IEEE International Conference on Computer Design, 2018

Co-manage power delivery and consumption for manycore systems using reinforcement learning.

Haoran Li, Zhongyuan Tian, Rafael K. V. Maeda, Xuanqi Chen, Jun Feng, Jiang Xu

Proceedings of the International Conference on Computer-Aided Design, 2018

Multi-device collaborative management through knowledge sharing.

Zhongyuan Tian, Zhe Wang, Haoran Li, Peng Yang, Rafael Kioji Vivas Maeda, Jiang Xu

Proceedings of the 23rd Asia and South Pacific Design Automation Conference, 2018

2017

Energy-Efficient Power Delivery System Paradigms for Many-Core Processors.

Haoran Li, Xuan Wang, Jiang Xu, Zhe Wang, Rafael K. V. Maeda, Zhehui Wang, Peng Yang, Luan H. K. Duong, Zhifei Wang

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2017

Fast and Accurate Exploration of Multi-level Caches Using Hierarchical Reuse Distance.

Rafael K. V. Maeda, Qiong Cai, Jiang Xu, Zhe Wang, Zhongyuan Tian

Proceedings of the 2017 IEEE International Symposium on High Performance Computer Architecture, 2017

Adaptive power delivery system management for many-core processors with on/off-chip voltage regulators.

Haoran Li, Jiang Xu, Zhe Wang, Peng Yang, Rafael K. V. Maeda, Zhongyuan Tian

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2017

MOCA: an Inter/Intra-Chip Optical Network for Memory.

Zhehui Wang, Zhengbin Pang, Peng Yang, Jiang Xu, Xuanqi Chen, Rafael K. V. Maeda, Zhifei Wang, Luan H. K. Duong, Haoran Li, Zhe Wang

Proceedings of the 54th Annual Design Automation Conference, 2017

Modular reinforcement learning for self-adaptive energy efficiency optimization in multicore system.

Zhe Wang, Zhongyuan Tian, Jiang Xu, Rafael K. V. Maeda, Haoran Li, Peng Yang, Zhehui Wang, Luan H. K. Duong, Zhifei Wang, Xuanqi Chen

Proceedings of the 22nd Asia and South Pacific Design Automation Conference, 2017

2016

Improve Chip Pin Performance Using Optical Interconnects.

Zhehui Wang, Jiang Xu, Peng Yang, Xuan Wang, Zhe Wang, Luan Huu Kinh Duong, Zhifei Wang, Rafael Kioji Vivas Maeda, Haoran Li

IEEE Trans. Very Large Scale Integr. Syst., 2016

A Holistic Modeling and Analysis of Optical-Electrical Interfaces for Inter/Intra-chip Interconnects.

Zhehui Wang, Jiang Xu, Peng Yang, Luan Huu Kinh Duong, Zhifei Wang, Xuan Wang, Zhe Wang, Haoran Li, Rafael Kioji Vivas Maeda

IEEE Trans. Very Large Scale Integr. Syst., 2016

An Adaptive Process-Variation-Aware Technique for Power-Gating-Induced Power/Ground Noise Mitigation in MPSoC.

Zhe Wang, Xuan Wang, Jiang Xu, Haoran Li, Rafael K. V. Maeda, Zhehui Wang, Peng Yang, Luan H. K. Duong, Zhifei Wang

IEEE Trans. Very Large Scale Integr. Syst., 2016

Coherent and Incoherent Crosstalk Noise Analyses in Interchip/Intrachip Optical Interconnection Networks.

Luan H. K. Duong, Zhehui Wang, Mahdi Nikdast, Jiang Xu, Peng Yang, Zhifei Wang, Zhe Wang, Rafael K. V. Maeda, Haoran Li, Xuan Wang, Sébastien Le Beux, Yvain Thonnart

IEEE Trans. Very Large Scale Integr. Syst., 2016

Alleviate Chip Pin Constraint for Multicore Processor by On/Off-Chip Power Delivery System Codesign.

Xuan Wang, Jiang Xu, Zhe Wang, Haoran Li, Peng Yang, Luan H. K. Duong, Rafael K. V. Maeda, Zhifei Wang

ACM J. Emerg. Technol. Comput. Syst., 2016

JADE: a Heterogeneous Multiprocessor System Simulation Platform Using Recorded and Statistical Application Models.

Rafael K. V. Maeda, Peng Yang, Xiaowen Wu, Zhe Wang, Jiang Xu, Zhehui Wang, Haoran Li, Luan H. K. Duong, Zhifei Wang

Proceedings of the 1st International Workshop on Advanced Interconnect Solutions and Technologies for Emerging Computing Systems, 2016

2015

Adaptively tolerate power-gating-induced power/ground noise under process variations.

Zhe Wang, Xuan Wang, Jiang Xu, Xiaowen Wu, Zhehui Wang, Peng Yang, Luan H. K. Duong, Haoran Li, Rafael Kioji Vivas Maeda, Zhifei Wang

Proceedings of the 2015 Design, Automation & Test in Europe Conference & Exhibition, 2015

Alleviate chip I/O pin constraints for multicore processors through optical interconnects.

Zhehui Wang, Jiang Xu, Peng Yang, Xuan Wang, Zhe Wang, Luan H. K. Duong, Zhifei Wang, Haoran Li, Rafael Kioji Vivas Maeda, Xiaowen Wu, Yaoyao Ye, Qinfen Hao

Proceedings of the 20th Asia and South Pacific Design Automation Conference, 2015

2014

CLEVER: Cross-Layer Error Verification, Evaluation and Reporting.

Rafael Kioji Vivas Maeda, Frank Sill Torres

Proceedings of the 27th Symposium on Integrated Circuits and Systems Design, 2014