Rafael B. Schvittz

According to our database, Rafael B. Schvittz authored at least 19 papers between 2015 and 2024.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2024

Transistor-Level Logic Gates Ranking Strategy for Selective Hardening.

Glória D. Claro da Silva, Rafael B. Schvittz, Paulo F. Butzen

Proceedings of the XIV Brazilian Symposium on Computing Systems Engineering, 2024

2023

Evaluating the Reliability of Different Voting Schemes for Fault Tolerant Approximate Systems.

Tiago R. Balen, Carlos J. González, Ingrid F. V. Oliveira, Leomar S. da Rosa Jr., Rafael Iankowski Soares, Rafael B. Schvittz, Nemitala Added, Eduardo L. A. Macchione, Vitor A. P. Aguiar, Marcilei Aparecida Guazzelli, Nilberto H. Medina, Paulo F. Butzen

J. Electron. Test., August, 2023

Impact on Radiation Robustness of Gate Mapping in FinFET Circuits under Work-function Fluctuation.

Bernardo Borges Sandoval, Leonardo Heitich Brendler, Fernanda Lima Kastensmidt, Ricardo Reis, Alexandra L. Zimpeck, Rafael B. Schvittz, Cristina Meinhardt

Proceedings of the IEEE International Symposium on Circuits and Systems, 2023

2022

Improving Soft Error Robustness of Full Adder Circuits with Decoupling Cell and Transistor Sizing.

Rafael N. M. Oliveira, Fábio G. R. G. da Silva, Ricardo Reis, Rafael B. Schvittz, Cristina Meinhardt

Proceedings of the 35th SBC/SBMicro/IEEE/ACM Symposium on Integrated Circuits and Systems Design, 2022

Evaluating Soft Error Reliability of Combinational Circuits Using a Monte Carlo Based Method.

Clayton R. Farias, Rafael B. Schvittz, Tiago R. Balen, Paulo F. Butzen

Proceedings of the 23rd IEEE Latin American Test Symposium, 2022

The Impact of Logic Gates Susceptibility in Overall Circuit Reliability Analysis.

Matheus F. Pontes, Ingrid F. V. Oliveira, Rafael B. Schvittz, Leomar Soares da Rosa Jr., Paulo F. Butzen

Proceedings of the IEEE International Symposium on Circuits and Systems, 2022

Fault Tolerance Evaluation of Different Majority Voter Designs.

Ingrid F. V. Oliveira, Matheus F. Pontes, Rafael B. Schvittz, Leomar S. da Rosa Jr., Paulo F. Butzen, Rafael Iankowski Soares

Proceedings of the IEEE International Symposium on Circuits and Systems, 2022

2021

Reliability Evaluation of Voters for Fault Tolerant Approximate Systems.

Tiago R. Balen, Carlos J. González, Ingrid F. V. Oliveira, Rafael B. Schvittz, Nemitala Added, Eduardo L. A. Macchione, Vitor A. P. de Aguiar, Marcilei Aparecida Guazzelli, Nilberto H. Medina, Paulo F. Butzen

Proceedings of the 22nd IEEE Latin American Test Symposium, 2021

2020

Methods for Susceptibility Analysis of Logic Gates in the Presence of Single Event Transients.

Rafael B. Schvittz, Paulo F. Butzen, Leomar S. da Rosa

Proceedings of the IEEE International Test Conference, 2020

2019

Exploring Logic Gates Layout to Improve the Accuracy of Circuit Reliability Estimation.

Rafael B. Schvittz, Leomar Soares, Paulo Francisco Butzen

Proceedings of the 27th IFIP/IEEE International Conference on Very Large Scale Integration, 2019

A Simplified Layout-Level method for Single Event Transient Faults Susceptibility on Logic Gates.

Rafael B. Schvittz, Denis Teixeira Franco, Leomar Soares, Paulo Francisco Butzen

Proceedings of the 27th IFIP/IEEE International Conference on Very Large Scale Integration, 2019

An Improved Technique for Logic Gate Susceptibility Evaluation of Single Event Transient Faults.

Rafael B. Schvittz, Denis Teixeira Franco, Leomar S. da Rosa, Paulo F. Butzen

Proceedings of the VLSI-SoC: New Technology Enabler, 2019

2018

Fault masking ratio analysis of majority voters topologies.

Ingrid F. V. Oliveira, Rafael B. Schvittz, Paulo F. Butzen

Proceedings of the 19th IEEE Latin-American Test Symposium, 2018

Reliability evaluation of circuits designed in multi- and single-stage versions.

Rafael B. Schvittz, Matheus F. Pontes, Cristina Meinhardt, Denis Teixeira Franco, Lirida A. B. Naviner, Leomar S. da Rosa, Paulo F. Butzen

Proceedings of the 9th IEEE Latin American Symposium on Circuits & Systems, 2018

Probabilistic Method for Reliability Estimation of SP- Networks considering Single Event Transient Faults.

Rafael B. Schvittz, Denis Teixeira Franco, Leomar S. da Rosa Jr., Paulo F. Butzen

Proceedings of the 25th IEEE International Conference on Electronics, Circuits and Systems, 2018

The Suitability of the SPR-MP Method to Evaluate the Reliability of Logic Circuits.

Matheus F. Pontes, Paulo F. Butzen, Rafael B. Schvittz, Leomar S. da Rosa Jr., Denis Teixeira Franco

Proceedings of the 25th IEEE International Conference on Electronics, Circuits and Systems, 2018

2016

Inserting permanent fault input dependence on PTM to improve robustness evaluation.

Rafael B. Schivittz, Rafael Fritz, Denis Teixeira Franco, Lirida A. B. Naviner, Cristina Meinhardt, Paulo F. Butzen

Proceedings of the 29th Symposium on Integrated Circuits and Systems Design, 2016

A probabilistic model for stuck-on faults in combinational logic gates.

Rafael B. Schivittz, Denis Teixeira Franco, Cristina Meinhardt, Paulo F. Butzen

Proceedings of the 17th Latin-American Test Symposium, 2016

2015

An evaluation of BTI degradation of 32nm standard cells.

Rafael B. Schivittz, Cristina Meinhardt, Paulo F. Butzen

Proceedings of the 2015 IEEE International Conference on Electronics, 2015