Radu Negulescu

According to our database1, Radu Negulescu authored at least 22 papers between 1997 and 2023.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Bibliography

2023
Using Z3 to Verify Inferences in Fragments of Linear Logic.
Proceedings of the Proceedings 7th Symposium on Working Formal Methods, 2023

2006
Semihiding operators and active-edge specification.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2006

2004
Duality for Three: Ternary Symmetry in Process Spaces.
Proceedings of the Theory Is Forever, 2004

High-Speed Reduced Stack Dual Lock Circuits.
Proceedings of the 10th International Symposium on Advanced Research in Asynchronous Circuits and Systems (ASYNC 2004), 2004

General Testers for Asynchronous Circuits.
Proceedings of the 10th International Symposium on Advanced Research in Asynchronous Circuits and Systems (ASYNC 2004), 2004

Bolstering Faith in GasP Circuits through Formal Verification.
Proceedings of the 10th International Symposium on Advanced Research in Asynchronous Circuits and Systems (ASYNC 2004), 2004

2003
Refinement-based formal verification with heterogeneous timing.
Int. J. Softw. Tools Technol. Transf., 2003

Generic Transforms on Incomplete Specifications of Asynchronous Interfaces.
Proceedings of 19th Conference on the Mathematical Foundations of Programming Semantics, 2003

2002
A single-rail handshake CDMA correlator.
Proceedings of the 2002 9th IEEE International Conference on Electronics, 2002

2001
Formal Verification of Peephole Optimizations in Asynchronous Circuits.
Proceedings of the Formal Techniques for Networked and Distributed Systems, 2001

Refinement-Based Formal Verification of Asynchronous Wrappers for Independently Clocked Domains in Systems on Chip.
Proceedings of the Correct Hardware Design and Verification Methods, 2001

Partial-Order Correctness-Preserving Properties of Delay-Insensitive Circuits.
Proceedings of the 7th International Symposium on Advanced Research in Asynchronous Circuits and Systems (ASYNC 2001), 2001

Formal verification of pulse-mode asynchronous circuits.
Proceedings of ASP-DAC 2001, 2001

Semi-Hiding Operators and the Analysis of Active-Edge Specifications for Digital Circuits.
Proceedings of the 2nd International Conference on Application of Concurrency to System Design (ACSD 2001), 2001

2000
Automata of Asynchronous Behaviors.
Theor. Comput. Sci., 2000

An asynchronous FIFO with fights: case study in speed optimization.
Proceedings of the 2000 7th IEEE International Conference on Electronics, 2000

Design of divergence-free protocol converters using supervisory control techniques.
Proceedings of the 2000 7th IEEE International Conference on Electronics, 2000

Process Spaces.
Proceedings of the CONCUR 2000, 2000

1998
Relative Liveness: From Intuition to Automated Verification.
Formal Methods Syst. Des., 1998

Verification of Speed-Dependences in Single-Rail Handshake Circuits.
Proceedings of the 4th International Symposium on Advanced Research in Asynchronous Circuits and Systems (ASYNC '98), 30 March, 1998

Event-Driven Verification of Switch-Level Correctness Concerns.
Proceedings of the 1st International Conference on Application of Concurrency to System Design (ACSD '98), 1998

1997
A Characterization of Finite Ternary Algebras.
Int. J. Algebra Comput., 1997


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