Radu Muresan
According to our database1,
Radu Muresan
authored at least 29 papers
between 2001 and 2022.
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Bibliography
2022
TMorph: A Traffic Morphing Framework to Test Network Defenses Against Adversarial Attacks.
Proceedings of the International Conference on Information Networking, 2022
2020
Proceedings of the 2020 International Symposium on Networks, Computers and Communications, 2020
2019
IEEE Access, 2019
Chaotic Encryption Algorithm With Key Controlled Neural Networks for Intelligent Transportation Systems.
IEEE Access, 2019
Design of Chaotic Block Cipher Operation Mode for Intelligent Transportation Systems.
Proceedings of the IEEE International Conference on Consumer Electronics, 2019
Proceedings of the 2019 IEEE Canadian Conference of Electrical and Computer Engineering, 2019
2018
IEEE Access, 2018
2017
Using Technology to Make Roads Safer: Adaptive Speed Limits for an Intelligent Transportation System.
IEEE Veh. Technol. Mag., 2017
J. Cryptogr. Eng., 2017
Proceedings of the 30th IEEE Canadian Conference on Electrical and Computer Engineering, 2017
IoT-based multifunctional Scalable real-time Enhanced Road Side Unit for Intelligent Transportation Systems.
Proceedings of the 30th IEEE Canadian Conference on Electrical and Computer Engineering, 2017
2016
IET Circuits Devices Syst., 2016
2014
IEEE Trans. Emerg. Top. Comput., 2014
Modeling the effect of NMOS gate capacitance in an on-chip decoupling capacitor PAA countermeasure.
Proceedings of the IEEE 57th International Midwest Symposium on Circuits and Systems, 2014
2013
Int. J. Inf. Acquis., 2013
On-chip decoupling architecture with variable nMOS gate capacitance for security protection.
Proceedings of the IEEE 56th International Midwest Symposium on Circuits and Systems, 2013
2012
Proceedings of the 2012 IEEE International Symposium on Circuits and Systems, 2012
2011
The effectiveness of a current flattening circuit as countermeasure against DPA attacks.
Microelectron. J., 2011
2009
2008
IEEE Trans. Computers, 2008
2006
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006
The Impact of the Implementation Style on Power Consumption and Security in Embedded Cryptosystems.
Proceedings of the Canadian Conference on Electrical and Computer Engineering, 2006
Proceedings of the Canadian Conference on Electrical and Computer Engineering, 2006
2005
ACM Trans. Embed. Comput. Syst., 2005
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005
Proceedings of the 3rd IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis, 2005
2004
Proceedings of the 2nd IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis, 2004
2001
Current consumption dynamics at instruction and program level for a <i>VLIW</i> DSP processor.
Proceedings of the 14th International Symposium on Systems Synthesis, 2001
Modeling Power Dynamics for an Embedded DSP Processor Core. An Empirical Model.
Proceedings of the SOC Design Methodologies, 2001