Radu M. Secareanu

According to our database1, Radu M. Secareanu authored at least 31 papers between 1999 and 2013.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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Links

On csauthors.net:

Bibliography

2013
Current profile of a microcontroller to determine electromagnetic emissions.
Proceedings of the 2013 IEEE International Symposium on Circuits and Systems (ISCAS2013), 2013

2010
Impact of module design on the signal-isolation of mixed-signal RF applications.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010

Compact substrate models for efficient noise coupling and signal isolation analysis.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010

2009
Methodology for Efficient Substrate Noise Analysis in Large-Scale Mixed-Signal Circuits.
IEEE Trans. Very Large Scale Integr. Syst., 2009

Identification of Dominant Noise Source and Parameter Sensitivity for Substrate Coupling.
IEEE Trans. Very Large Scale Integr. Syst., 2009

Worst Case Power/Ground Noise Estimation Using an Equivalent Transition Time for Resonance.
IEEE Trans. Circuits Syst. I Regul. Pap., 2009

Contact merging algorithm for efficient substrate noise analysis in large scale circuits.
Proceedings of the 19th ACM Great Lakes Symposium on VLSI 2009, 2009

2008
Efficient Distributed On-Chip Decoupling Capacitors for Nanoscale ICs.
IEEE Trans. Very Large Scale Integr. Syst., 2008

Dominant Substrate Noise Coupling Mechanism for Multiple Switching Gates.
Proceedings of the 9th International Symposium on Quality of Electronic Design (ISQED 2008), 2008

Input port reduction for efficient substrate extraction in large scale IC's.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2008), 2008

Equivalent rise time for resonance in power/ground noise estimation.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2008), 2008

2007
Guest Editorial Special Section on System-on-Chip Integration: Challenges and Implications.
IEEE Trans. Very Large Scale Integr. Syst., 2007

Substrate Noise Reduction Based On Noise Aware Cell Design.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007

Efficient placement of distributed on-chip decoupling capacitors in nanoscale ICs.
Proceedings of the 2007 International Conference on Computer-Aided Design, 2007

2006
Substrate and Ground Noise Interactions in Mixed-Signal Circuits.
Proceedings of the 2006 IEEE International SOC Conference, Austin, Texas, USA, 2006

Low power architectures using localised non-volatile memory and selective power shut-down.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006

Maximum effective distance of on-chip decoupling capacitors in power distribution grids.
Proceedings of the 16th ACM Great Lakes Symposium on VLSI 2006, Philadelphia, PA, USA, April 30, 2006

2005
On-Chip Power Noise Reduction Techniques in High Performance SoC-Based Integrated Circuits.
Proceedings of the Proceedings 2005 IEEE International SOC Conference, 2005

Accurate Simulation Environment for Signal Isolation in Mixed-Signal Design.
Proceedings of the Proceedings 2005 IEEE International SOC Conference, 2005

Managing substrate and interconnect noise from high performance repeater insertion in a mixed-signal environment.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005

2004
Substrate coupling in digital circuits in mixed-signal smart-power systems.
IEEE Trans. Very Large Scale Integr. Syst., 2004

Signal integrity implications of inductor-to-circuit proximity.
Proceedings of the Proceedings 2004 IEEE International SOC Conference, 2004

An adaptive circuits concept to address mismatch in analog circuits.
Proceedings of the 2004 International Symposium on Circuits and Systems, 2004

2002
A low-voltage low-noise digital buffer system.
Proceedings of the 2002 International Symposium on Circuits and Systems, 2002

2001
A comparative study of the behavior of NMOS and CMOS digital circuits under substrate noise.
Proceedings of the 2001 8th IEEE International Conference on Electronics, 2001

2000
Physical design to improve the noise immunity of digital circuits in a mixed-signal smart-power system.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2000

Transparent repeaters.
Proceedings of the 10th ACM Great Lakes Symposium on VLSI 2000, 2000

1999
A universal CMOS voltage interface circuit.
Proceedings of the 1999 International Symposium on Circuits and Systems, ISCAS 1999, Orlando, Florida, USA, May 30, 1999

A high precision CMOS current mirror/divider.
Proceedings of the 1999 International Symposium on Circuits and Systems, ISCAS 1999, Orlando, Florida, USA, May 30, 1999

Exploiting hysteresis in a CMOS buffer.
Proceedings of the 6th IEEE International Conference on Electronics, Circuits and Systems, 1999

Noise Immunity of Digital Circuits in Mixed-Signal Smart Power Systems.
Proceedings of the 9th Great Lakes Symposium on VLSI (GLS-VLSI '99), 1999


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