Rachid Rayess

According to our database1, Rachid Rayess authored at least 6 papers between 2002 and 2024.

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Bibliography

2024
A Fully Integrated 1 GHz 8A I<sub>max</sub> Step-Down and Step-Up Switched Capacitor Voltage Regulator in 3 nm FinFET Technology Featuring Auto Mode Transition.
IEEE Trans. Circuits Syst. I Regul. Pap., July, 2024

2022
A IMax |<sub>max<sup>,</sup></sub> Fully Integrated Multi-Phase Voltage Regulator with 91.5% Peak Efficiency at 1.8 to 1V, Operating at 50MHz and Featuring a Digitally Assisted Controller with Automatic Phase Shedding and Soft Switching in 4nm Class FinFET CMOS.
Proceedings of the IEEE International Solid-State Circuits Conference, 2022

2015
Efficient Control and Communication Paradigms for Coarse-Grained Spatial Architectures.
ACM Trans. Comput. Syst., 2015

2014
Efficient Spatial Processing Element Control via Triggered Instructions.
IEEE Micro, 2014

2013
Triggered instructions: a control paradigm for spatially-programmed architectures.
Proceedings of the 40th Annual International Symposium on Computer Architecture, 2013

2002
Power and CAD considerations for the 1.75mbyte, 1.2ghz L2 cache on the alpha 21364 CPU.
Proceedings of the 12th ACM Great Lakes Symposium on VLSI 2002, 2002


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