Rabi N. Mahapatra

Proceedings of the 24th International Symposium on Quality Electronic Design, 2023

Cross-layer Age-aware Scheme for Highly Reliable Memristor Crossbar Accelerator Design.

[BibT_eX]

[DOI]

Sudharsan Govardan

Proceedings of the IEEE International Symposium on Smart Electronic Systems, 2023

2022

Exploiting Zero Knowledge Proof and Blockchains Towards the Enforcement of Anonymity, Data Integrity and Privacy (ADIP) in the IoT.

[BibT_eX]

[DOI]

IEEE Trans. Emerg. Top. Comput., 2022

An Intelligent 2-D Chart Method With Autodetection for Weak Quasar Blind TDD Estimation in Deep Space △DOR Measurement.

[BibT_eX]

[DOI]

IEEE Trans. Aerosp. Electron. Syst., 2022

2021

BPLight-CNN: A Photonics-Based Backpropagation Accelerator for Deep Learning.

[BibT_eX]

[DOI]

Sai Vineel Reddy Chittamuru

Sudeep Pasricha

Debashis Sahoo

ACM J. Emerg. Technol. Comput. Syst., 2021

Householder Sketch for Accurate and Accelerated Least-Mean-Squares Solvers.

[BibT_eX]

[DOI]

Proceedings of the 38th International Conference on Machine Learning, 2021

2020

Adaptive Group-Based Zero Knowledge Proof-Authentication Protocol in Vehicular Ad Hoc Networks.

[BibT_eX]

[DOI]

Felix G. Hamza-Lup

IEEE Trans. Intell. Transp. Syst., 2020

Distributed Training of Support Vector Machine on a Multiple-FPGA System.

[BibT_eX]

[DOI]

IEEE Trans. Computers, 2020

On-chip Parallel Photonic Reservoir Computing using Multiple Delay Lines.

[BibT_eX]

[DOI]

Syed Ali Hasnain

Proceedings of the 32nd IEEE International Symposium on Computer Architecture and High Performance Computing, 2020

BPhoton-CNN: An Ultrafast Photonic Backpropagation Accelerator for Deep Learning.

[BibT_eX]

[DOI]

Proceedings of the GLSVLSI '20: Great Lakes Symposium on VLSI 2020, 2020

Heuristic Function Evolution For Pathfinding Algorithm in FPGA Accelerator.

[BibT_eX]

[DOI]

Proceedings of the 3rd IEEE International Conference on Artificial Intelligence and Knowledge Engineering, 2020

Multi-Agent Pathfinding with Hierarchical Evolutionary Hueristic A.

[BibT_eX]

[DOI]

Proceedings of the 3rd IEEE International Conference on Artificial Intelligence and Knowledge Engineering, 2020

2019

Fast and Communication-Efficient Algorithm for Distributed Support Vector Machine Training.

[BibT_eX]

[DOI]

Vivek Sarin

IEEE Trans. Parallel Distributed Syst., 2019

Evolutionary Heuristic A* Search: Pathfinding Algorithm with Self-Designed and Optimized Heuristic Function.

[BibT_eX]

[DOI]

Eric Jing Du

Int. J. Semantic Comput., 2019

Adaptive Group-based Zero Knowledge Proof-Authentication Protocol (AGZKP-AP) in Vehicular Ad Hoc Networks.

[BibT_eX]

[DOI]

Felix G. Hamza-Lup

CoRR, 2019

Continuous Authentication of Embedded Software.

[BibT_eX]

[DOI]

Karl Ott

Proceedings of the 18th IEEE International Conference On Trust, 2019

MReC: A Multilayer Photonic Reservoir Computing Architecture.

[BibT_eX]

[DOI]

Dharanidhar Dhang

Syed Ali Hasnain

Sai Vineel Reddy Chittamuru

Proceedings of the 20th International Symposium on Quality Electronic Design, 2019

FPGA-based Distributed Edge Training of SVM.

[BibT_eX]

[DOI]

Proceedings of the 2019 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2019

2018

BiGNoC: Accelerating Big Data Computing with Application-Specific Photonic Network-on-Chip Architectures.

[BibT_eX]

[DOI]

Sudeep Pasricha

IEEE Trans. Parallel Distributed Syst., 2018

Hybrid algorithm for accumulated error suppression in open-loop Doppler receiver.

[BibT_eX]

[DOI]

IET Commun., 2018

Privacy-Preserving ECG based Active Authentication (PPEA2) for IoT Devices.

[BibT_eX]

[DOI]

Ghanshyam Bhutra

Proceedings of the 37th IEEE International Performance Computing and Communications Conference, 2018

Hardware Performance Counters for Embedded Software Anomaly Detection.

[BibT_eX]

[DOI]

Karl Ott

Proceedings of the 2018 IEEE 16th Intl Conf on Dependable, 2018

Evolutionary Heuristic A* Search: Heuristic Function Optimization via Genetic Algorithm.

[BibT_eX]

[DOI]

Jing Du

Proceedings of the First IEEE International Conference on Artificial Intelligence and Knowledge Engineering, 2018

2017

A Time-shared Photonic Reservoir Computer for Big Data Analytics.

[BibT_eX]

[DOI]

CoRR, 2017

Distributed QR Decomposition Framework for Training Support Vector Machines.

[BibT_eX]

[DOI]

V. N. S. Prithvi Sakuru

Vivek Sarin

Proceedings of the 37th IEEE International Conference on Distributed Computing Systems, 2017

ConvLight: A Convolutional Accelerator with Memristor Integrated Photonic Computing.

[BibT_eX]

[DOI]

Proceedings of the 24th IEEE International Conference on High Performance Computing, 2017

Using FPGA implementations for evaluation of internet retransmission-time-out predictors.

[BibT_eX]

[DOI]

Luis Rizo Domínguez

Ivan R. Padilla-Cantoya

Proceedings of the Fifth European Conference on the Engineering of Computer-Based Systems, 2017

Private matching and set intersection computation in multi-agent and industrial control systems.

[BibT_eX]

[DOI]

Proceedings of the 12th Annual Conference on Cyber and Information Security Research, 2017

Islands of heaters: A novel thermal management framework for photonic NoCs.

[BibT_eX]

[DOI]

Sai Vineel Reddy Chittamuru

Sudeep Pasricha

Proceedings of the 22nd Asia and South Pacific Design Automation Conference, 2017

2016

A Relaxed Synchronization Approach for Solving Parallel Quadratic Programming Problems with Guaranteed Convergence.

[BibT_eX]

[DOI]

Kooktae Lee

Raktim Bhattacharya

V. N. S. Prithvi Sakuru

Proceedings of the 2016 IEEE International Parallel and Distributed Processing Symposium, 2016

2015

Mode-Division-Multiplexed Photonic Router for High Performance Network-on-Chip.

[BibT_eX]

[DOI]

Proceedings of the 28th International Conference on VLSI Design, 2015

A 2-layer laser multiplexed photonic network-on-chip.

[BibT_eX]

[DOI]

Biplab Patra

Proceedings of the Sixteenth International Symposium on Quality Electronic Design, 2015

PID controlled thermal management in photonic network-on-chip.

[BibT_eX]

[DOI]

Eun Jung Kim

Proceedings of the 33rd IEEE International Conference on Computer Design, 2015

A Multilayered Design Approach for Efficient Hybrid 3D Photonics Network-on-chip.

[BibT_eX]

[DOI]

Biplab Patra

Proceedings of the 25th edition on Great Lakes Symposium on VLSI, GLVLSI 2015, Pittsburgh, PA, USA, May 20, 2015

2013

A low-jitter phase-locked resonant clock generation and distribution scheme.

[BibT_eX]

[DOI]

Kalyana C. Bollapalli

Nikhil Jayakumar

Proceedings of the 2013 IEEE 31st International Conference on Computer Design, 2013

Distributed Collaborative Filtering on a Single Chip Cloud Computer.

[BibT_eX]

[DOI]

Proceedings of the 2013 IEEE International Conference on Cloud Engineering, 2013

A source-synchronous Htree-based network-on-chip.

[BibT_eX]

[DOI]

Proceedings of the Great Lakes Symposium on VLSI 2013 (part of ECRC), 2013

Exploring topologies for source-synchronous ring-based network-on-chip.

[BibT_eX]

[DOI]

Proceedings of the Design, Automation and Test in Europe, 2013

A reconfigurable computing architecture for semantic information filtering.

[BibT_eX]

[DOI]

Proceedings of the 2013 IEEE International Conference on Big Data (IEEE BigData 2013), 2013

2012

The Three-Tier Security Scheme in Wireless Sensor Networks with Mobile Sinks.

[BibT_eX]

[DOI]

IEEE Trans. Parallel Distributed Syst., 2012

Optimizing a Collaborative Filtering Recommender for Many-Core Processors.

[BibT_eX]

[DOI]

Aalap Tripathy

Proceedings of the Sixth IEEE International Conference on Semantic Computing, 2012

Designing a Collaborative Filtering Recommender on the Single Chip Cloud Computer.

[BibT_eX]

[DOI]

Proceedings of the 2012 SC Companion: High Performance Computing, 2012

Architectural simulations of a fast, source-synchronous ring-based Network-on-Chip design.

[BibT_eX]

[DOI]

Proceedings of the 30th International IEEE Conference on Computer Design, 2012

A fast, source-synchronous ring-based network-on-chip design.

[BibT_eX]

[DOI]

Proceedings of the 2012 Design, Automation & Test in Europe Conference & Exhibition, 2012

2011

Key Predistribution Schemes for Establishing Pairwise Keys with a Mobile Sink in Sensor Networks.

[BibT_eX]

[DOI]

IEEE Trans. Parallel Distributed Syst., 2011

A Power and Throughput-Efficient Packet Classifier with n Bloom Filters.

[BibT_eX]

[DOI]

IEEE Trans. Computers, 2011

Appropriate Evolutionary Algorithm for Scheduling in FMS.

[BibT_eX]

[DOI]

Bibhuti Bhusan Choudhury

Bibhuti Bhusan Biswal

Debadutta Mishra

Int. J. Appl. Evol. Comput., 2011

Interconnected Tile Standing Wave Resonant Oscillator Based Clock Distribution Circuits.

[BibT_eX]

[DOI]

Proceedings of the VLSI Design 2011: 24th International Conference on VLSI Design, 2011

An Automated Approach for Minimum Jitter Buffered H-Tree Construction.

[BibT_eX]

[DOI]

Nikhil Jayakumar

Kalyana C. Bollapalli

Proceedings of the VLSI Design 2011: 24th International Conference on VLSI Design, 2011

Optimizing a Semantic Comparator Using CUDA-enabled Graphics Hardware.

[BibT_eX]

[DOI]

Aalap Tripathy

Proceedings of the 5th IEEE International Conference on Semantic Computing (ICSC 2011), 2011

Temperature aware energy management for real-time scheduling.

[BibT_eX]

[DOI]

Nikhil Gupta

Proceedings of the 12th International Symposium on Quality Electronic Design, 2011

Parallel Processor Core for Semantic Search Engines.

[BibT_eX]

[DOI]

Proceedings of the 25th IEEE International Symposium on Parallel and Distributed Processing, 2011

2010

Semantic Technologies for Searching in e-Science Grids.

[BibT_eX]

[DOI]

Amitava Biswas

Proceedings of the Semantic e-Science, 2010

Design Space Exploration for Efficient Resource Utilization in Coarse-Grained Reconfigurable Architecture.

[BibT_eX]

[DOI]

Kiyoung Choi

IEEE Trans. Very Large Scale Integr. Syst., 2010

Dynamic Context Compression for Low-Power Coarse-Grained Reconfigurable Architecture.

[BibT_eX]

[DOI]

IEEE Trans. Very Large Scale Integr. Syst., 2010

PowerAntz: Ant behavior inspired power budget distribution scheme for Network-on-Chip systems.

[BibT_eX]

[DOI]

Suman Kalyan Mandal

Microelectron. J., 2010

IntellBatt: Toward a Smarter Battery.

[BibT_eX]

[DOI]

Computer, 2010

A Hardware Scheduler for Real Time Multiprocessor System on Chip.

[BibT_eX]

[DOI]

Proceedings of the VLSI Design 2010: 23rd International Conference on VLSI Design, 2010

A parallel architecture for meaning comparison.

[BibT_eX]

[DOI]

Proceedings of the 24th IEEE International Symposium on Parallel and Distributed Processing, 2010

Low power nanoscale buffer management for network on chip routers.

[BibT_eX]

[DOI]

Proceedings of the 20th ACM Great Lakes Symposium on VLSI 2009, 2010

Reliability aware power management for dual-processor real-time embedded systems.

[BibT_eX]

[DOI]

Ranjani Sridharan

Proceedings of the 47th Design Automation Conference, 2010

2009

Low Power Reconfiguration Technique for Coarse-Grained Reconfigurable Architecture.

[BibT_eX]

[DOI]

IEEE Trans. Very Large Scale Integr. Syst., 2009

Hardware assisted watermarking for multimedia.

[BibT_eX]

[DOI]

Elias Kougianos

Saraju P. Mohanty

Comput. Electr. Eng., 2009

Semantic Key for Meaning Based Searching.

[BibT_eX]

[DOI]

Proceedings of the 3rd IEEE International Conference on Semantic Computing (ICSC 2009), 2009

A key pre-distribution scheme for heterogeneous sensor networks.

[BibT_eX]

[DOI]

Proceedings of the International Conference on Wireless Communications and Mobile Computing: Connecting the World Wirelessly, 2009

Mobile sink using multiple channels to defend against wormhole attacks in wireless sensor networks.

[BibT_eX]

[DOI]

Proceedings of the 28th International Performance Computing and Communications Conference, 2009

A Hash-based Scalable IP lookup using Bloom and Fingerprint Filters.

[BibT_eX]

[DOI]

Laxmi N. Bhuyan

Proceedings of the 17th annual IEEE International Conference on Network Protocols, 2009

Representation of Complex Concepts for Semantic Routed Network.

[BibT_eX]

[DOI]

Proceedings of the Distributed Computing and Networking, 10th International Conference, 2009

A distributed concurrent on-line test scheduling protocol for many-core NoC-based systems.

[BibT_eX]

[DOI]

Proceedings of the 27th International Conference on Computer Design, 2009

Search Co-Ordination by Semantic Routed Network.

[BibT_eX]

[DOI]

Amitava Biswas

Proceedings of the 18th International Conference on Computer Communications and Networks, 2009

Dynamic context management for low power coarse-grained reconfigurable architecture.

[BibT_eX]

[DOI]

Proceedings of the 19th ACM Great Lakes Symposium on VLSI 2009, 2009

Hierarchical reconfigurable computing arrays for efficient CGRA-based embedded systems.

[BibT_eX]

[DOI]

Proceedings of the 46th Design Automation Conference, 2009

2008

Data Handling Limits of On-Chip Interconnects.

[BibT_eX]

[DOI]

Gwan Choi

IEEE Trans. Very Large Scale Integr. Syst., 2008

Robust Concurrent Online Testing of Network-on-Chip-Based SoCs.

[BibT_eX]

[DOI]

IEEE Trans. Very Large Scale Integr. Syst., 2008

A Dynamic Slack Management Technique for Real-Time Distributed Embedded Systems.

[BibT_eX]

[DOI]

Subrata Acharya

IEEE Trans. Computers, 2008

Practical and Verifiable C++ Dynamic Cast for Hard Real-Time Systems.

[BibT_eX]

[DOI]

Damian Dechev

Bjarne Stroustrup

J. Comput. Sci. Eng., 2008

Time-Division-Multiplexed Test Delivery for NoC Systems.

[BibT_eX]

[DOI]

John Mark Nolen

IEEE Des. Test Comput., 2008

Dynamic Aggregation of Virtual Addresses in TLB Using TCAM Cells.

[BibT_eX]

[DOI]

Rupak Samanta

Jason Surprise

Proceedings of the 21st International Conference on VLSI Design (VLSI Design 2008), 2008

Secure Data Collection Scheme in Wireless Sensor Network with Mobile Sink.

[BibT_eX]

[DOI]

Proceedings of The Seventh IEEE International Symposium on Networking Computing and Applications, 2008

An On-Demand Test Triggering Mechanism for NoC-Based Safety-Critical Systems.

[BibT_eX]

[DOI]

Proceedings of the 9th International Symposium on Quality of Electronic Design (ISQED 2008), 2008

C++ Dynamic Cast in Autonomous Space Systems.

[BibT_eX]

[DOI]

Proceedings of the 11th IEEE International Symposium on Object-Oriented Real-Time Distributed Computing (ISORC 2008), 2008

PowerAntz: distributed power sharing strategy for network on chip.

[BibT_eX]

[DOI]

Suman Kalyan Mandal

Proceedings of the 2008 International Symposium on Low Power Electronics and Design, 2008

A space- and time-efficient hash table hierarchically indexed by Bloom filters.

[BibT_eX]

[DOI]

Proceedings of the 22nd IEEE International Symposium on Parallel and Distributed Processing, 2008

Reusable context pipelining for low power coarse-grained reconfigurable architecture.

[BibT_eX]

[DOI]

Proceedings of the 22nd IEEE International Symposium on Parallel and Distributed Processing, 2008

An Efficient Key Distribution Scheme for Establishing Pairwise Keys with a Mobile Sink in Distributed Sensor Networks.

[BibT_eX]

[DOI]

Proceedings of the 2008 IEEE International Performance, 2008

A Memory-Efficient Hashing by Multi-Predicate Bloom Filters for Packet Classification.

[BibT_eX]

[DOI]

Proceedings of the INFOCOM 2008. 27th IEEE International Conference on Computer Communications, 2008

In-field NoC-based SoC testing with distributed test vector storage.

[BibT_eX]

[DOI]

Proceedings of the 26th International Conference on Computer Design, 2008

Optimization of Semantic Routing Table.

[BibT_eX]

[DOI]

Amitava Biswas

Proceedings of the 17th International Conference on Computer Communications and Networks, 2008

A Throughput-Efficient Packet Classifier with n Bloom filters.

[BibT_eX]

[DOI]

Proceedings of the Global Communications Conference, 2008. GLOBECOM 2008, New Orleans, LA, USA, 30 November, 2008

A New Array Fabric for Coarse-Grained Reconfigurable Architecture.

[BibT_eX]

[DOI]

Proceedings of the 11th Euromicro Conference on Digital System Design: Architectures, 2008

Feedback-controlled reliability-aware power management for real-time embedded systems.

[BibT_eX]

[DOI]

Ranjani Sridharan

Nikhil Gupta

Proceedings of the 45th Design Automation Conference, 2008

IntellBatt: towards smarter battery design.

[BibT_eX]

[DOI]

Proceedings of the 45th Design Automation Conference, 2008

2007

An Efficient Approach to On-Chip Logic Minimization.

[BibT_eX]

[DOI]

IEEE Trans. Very Large Scale Integr. Syst., 2007

Analysis of RealTime Embedded Applications in the Presence of a Stochastic Fault Model.

[BibT_eX]

[DOI]

Ranjani Sridharan

Proceedings of the 20th International Conference on VLSI Design (VLSI Design 2007), 2007

An Enhanced CAM Architecture to Accelerate LZW Compression Algorithm.

[BibT_eX]

[DOI]

Rupak Samanta

Proceedings of the 20th International Conference on VLSI Design (VLSI Design 2007), 2007

An Infrastructure IP for Online Testing of Network-on-Chip Based SoCs.

[BibT_eX]

[DOI]

Proceedings of the 8th International Symposium on Quality of Electronic Design (ISQED 2007), 2007

SAPP: scalable and adaptable peak power management in nocs.

[BibT_eX]

[DOI]

Proceedings of the 2007 International Symposium on Low Power Electronics and Design, 2007

Dynamically compressible context architecture for low power coarse-grained reconfigurable array.

[BibT_eX]

[DOI]

Proceedings of the 25th International Conference on Computer Design, 2007

A Safety Analysis Framework for COTS Microprocessors in Safety-Critical Applications.

[BibT_eX]

[DOI]

Proceedings of the Tenth IEEE International Symposium on High Assurance Systems Engineering (HASE 2007), 2007

A Robust Protocol for Concurrent On-Line Test (COLT) of NoC-based Systems-on-a-Chip.

[BibT_eX]

[DOI]

Proceedings of the 44th Design Automation Conference, 2007

2006

Antenna Avoidance in Layer Assignment.

[BibT_eX]

[DOI]

Di Wu

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2006

Analytical bound for unwanted clock skew due to wire width variation.

[BibT_eX]

[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2006

Reducing clock skew variability via crosslinks.

[BibT_eX]

[DOI]

Anand Rajaram

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2006

Programmable LDPC Decoder Based on the Bubble-Sort Algorithm.

[BibT_eX]

[DOI]

Proceedings of the 19th International Conference on VLSI Design (VLSI Design 2006), 2006

Information Theoretic Capacity of Long On-chip Interconnects in the Presence of Crosstalk.

[BibT_eX]

[DOI]

Proceedings of the 7th International Symposium on Quality of Electronic Design (ISQED 2006), 2006

Core Network Interface Architecture and Latency Constrained On-Chip Communication.

[BibT_eX]

[DOI]

Proceedings of the 7th International Symposium on Quality of Electronic Design (ISQED 2006), 2006

Information theoretic approach to address delay and reliability in long on-chip interconnects.

[BibT_eX]

[DOI]

Proceedings of the 2006 International Conference on Computer-Aided Design, 2006

2005

An Energy-Efficient Slack Distribution Technique for Multimode Distributed Real-Time Embedded Systems.

[BibT_eX]

[DOI]

Wei Zhao

IEEE Trans. Parallel Distributed Syst., 2005

EaseCAM: An Energy and Storage Efficient TCAM-Based Router Architecture for IP Lookup.

[BibT_eX]

[DOI]

V. C. Ravikumar

Laxmi N. Bhuyan

IEEE Trans. Computers, 2005

Fully associative cache partitioning with don't care bits for real-time applications.

[BibT_eX]

[DOI]

Ali Chousein

SIGBED Rev., 2005

An integrated scheduling and buffer management scheme for input queued switches with finite buffer space.

[BibT_eX]

[DOI]

Anuj Kumar

Comput. Commun., 2005

A Heuristic for Peak Power Constrained Design of Network-on-Chip (NoC) Based Multimode Systems.

[BibT_eX]

[DOI]

Proceedings of the 18th International Conference on VLSI Design (VLSI Design 2005), 2005

A TDM Test Scheduling Method for Network-on-Chip Systems.

[BibT_eX]

[DOI]

John Mark Nolen

Proceedings of the Sixth International Workshop on Microprocessor Test and Verification (MTV 2005), 2005

Coupling aware timing optimization and antenna avoidance in layer assignment.

[BibT_eX]

[DOI]

Di Wu

Proceedings of the 2005 International Symposium on Physical Design, 2005

Quantized LDPC decoder design for binary symmetric channels.

[BibT_eX]

[DOI]

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005

X-Routing using Two Manhattan Route Instances.

[BibT_eX]

[DOI]

Nikhil Jayakumar

Vijay Balasubramanian

Edward Hursey

Proceedings of the 23rd International Conference on Computer Design (ICCD 2005), 2005

DiCER: distributed and cost-effective redundancy for variation tolerance.

[BibT_eX]

[DOI]

Proceedings of the 2005 International Conference on Computer-Aided Design, 2005

Integrated scheduling and buffer management input queued switches under extreme traffic scheme conditions.

[BibT_eX]

[DOI]

Anuj Kumar

Proceedings of IEEE International Conference on Communications, 2005

Lifetime Modeling of a Sensor Network.

[BibT_eX]

[DOI]

Vivek Rai

Proceedings of the 2005 Design, 2005

TCAM enabled on-chip logic minimization.

[BibT_eX]

[DOI]

Proceedings of the 42nd Design Automation Conference, 2005

Timing driven track routing considering coupling capacitance.

[BibT_eX]

[DOI]

Proceedings of the 2005 Conference on Asia South Pacific Design Automation, 2005

2004

TCAM Architecture for IP Lookup Using Prefix Properties.

[BibT_eX]

[DOI]

V. C. Ravikumar

IEEE Micro, 2004

M-trie: an efficient approach to on-chip logic minimization.

[BibT_eX]

[DOI]

Proceedings of the 2004 International Conference on Computer-Aided Design, 2004

Reducing clock skew variability via cross links.

[BibT_eX]

[DOI]

Anand Rajaram

Proceedings of the 41th Design Automation Conference, 2004

Energy characterization of filesystems for diskless embedded systems.

[BibT_eX]

[DOI]

Siddharth Choudhuri

Proceedings of the 41th Design Automation Conference, 2004

Layer assignment for crosstalk risk minimization.

[BibT_eX]

[DOI]

Proceedings of the 2004 Conference on Asia South Pacific Design Automation: Electronic Design and Solution Fair 2004, 2004

2003

Guest Editorial.

[BibT_eX]

[DOI]

Microelectron. J., 2003

Interfacing Cores with On-chip Packet-Switched Networks.

[BibT_eX]

[DOI]

Proceedings of the 16th International Conference on VLSI Design (VLSI Design 2003), 2003

High Performance Code Generation through Lazy Activation Records.

[BibT_eX]

[DOI]

Proceedings of the 7th Annual Workshop on Interaction between Compilers and Computer Architecture (INTERACT-7 2003), 2003

2002

Modified LC-Trie Based Efficient Routing Lookup.

[BibT_eX]

[DOI]

V. C. Ravikumar

Jyh-Charn Liu

Proceedings of the 10th International Workshop on Modeling, 2002

2000

Mapping of Neural Network Models onto Systolic Arrays.

[BibT_eX]

[DOI]

J. Parallel Distributed Comput., 2000

Hierarchical Simulation of a Multiprocessor Architecture.

[BibT_eX]

[DOI]

Marius Pirvu

Laxmi N. Bhuyan

Proceedings of the IEEE International Conference On Computer Design: VLSI In Computers & Processors, 2000

1999

Mapping of neural network models onto massively parallel hierarchical computer systems.

[BibT_eX]

[DOI]

J. Syst. Archit., 1999

1997

Performance analysis of 2-D inverse fast cosine transform employing multiprocessors.

[BibT_eX]

[DOI]

Akhilesh Kumar

IEEE Trans. Signal Process., 1997

Modelling Hadamard Haar transform algorithm for omega connected multiprocessors.

[BibT_eX]

[DOI]

B. N. Chatterji

Signal Process., 1997

A Parallel Formulation of Back-Propagation Learning on Distributed Memory Multiprocessors.

[BibT_eX]

[DOI]

B. N. Chatterji

Parallel Comput., 1997

Modeling of Wavelet Transform for De Bruijn Graph Connected Multiprocessors.

[BibT_eX]

Proceedings of the International Conference on Parallel and Distributed Processing Techniques and Applications, 1997

1996

Mapping of Neural Network Models Onto Two-Dimensional Processor Arrays.

[BibT_eX]

[DOI]

Parallel Comput., 1996

Performance Modeling of discrete cosine Transform for Star Graph Connected Multiprocessors.

[BibT_eX]

[DOI]

B. N. Chatterji

J. Circuits Syst. Comput., 1996

1994

Implementation of Fast Hartley Transform.

[BibT_eX]

[DOI]

Jharna Majumdar

Proceedings of the Proceedings 1994 International Conference on Parallel and Distributed Systems, 1994

Parallel and Distributed Processing Research in Some Asian Countries.

[BibT_eX]

[DOI]

Proceedings of the Proceedings 1994 International Conference on Parallel and Distributed Systems, 1994

1993

Modelling a 2-D inverse fast cosine transform algorithm on a multistage network.

[BibT_eX]

[DOI]

Signal Process., 1993

1992

Vector Hartley Transform Employing Multiprocessors.

[BibT_eX]

[DOI]

Akhilesh Kumar

Proceedings of the 6th International Parallel Processing Symposium, 1992

1991

Modelling a Morphological thinning Algorithm for Shared Memory SIMD Computers.

[BibT_eX]

[DOI]

Abhijit Datta

Shirish V. Joshi

Parallel Process. Lett., 1991

Modelling a Fast Parallel Thinning Algorithm for Shared Memory SIMD Computers.

[BibT_eX]

[DOI]

Harish Pareek

Inf. Process. Lett., 1991

1990

Performance of Parallel FFT Algorithm on Multiprocessors.

[BibT_eX]

V. Ashok Kumar