R. Vijay Sai

According to our database1, R. Vijay Sai authored at least 2 papers between 2019 and 2020.

Collaborative distances:
  • Dijkstra number2 of six.
  • Erdős number3 of six.

Timeline

Legend:

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Article 
PhD thesis 
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Links

On csauthors.net:

Bibliography

2020
Hyper switching memory utilization on hybrid main memory for improved task execution and reduced power consumption.
Microprocess. Microsystems, 2020

2019
Undeviating Adaptive Sheltered Cryptography (UASC) method based low power and high secure cache memory design.
Microprocess. Microsystems, 2019


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