R. Stanley Williams
Orcid: 0000-0003-0213-4259
According to our database1,
R. Stanley Williams
authored at least 46 papers
between 1993 and 2023.
Collaborative distances:
Collaborative distances:
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Online presence:
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Bibliography
2023
IEEE J. Emerg. Sel. Topics Circuits Syst., March, 2023
Proceedings of the IEEE International Symposium on Circuits and Systems, 2023
Proceedings of the IEEE International Symposium on Circuits and Systems, 2023
2022
Adv. Intell. Syst., 2022
Proceedings of the 19th International SoC Design Conference, 2022
Combinatorial Optimization in Hopfield Networks with Noise and Diagonal Perturbations.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2022
Proceedings of the IEEE International Symposium on Circuits and Systems, 2022
Proceedings of the IEEE International Symposium on Circuits and Systems, 2022
Proceedings of the IEEE International Symposium on Circuits and Systems, 2022
2021
IEEE Trans. Circuits Syst. I Regul. Pap., 2021
Improved Hopfield Network Optimization Using Manufacturable Three-Terminal Electronic Synapses.
IEEE Trans. Circuits Syst. I Regul. Pap., 2021
IEEE Trans. Circuits Syst. I Regul. Pap., 2021
Proceedings of the IEEE International Symposium on Circuits and Systems, 2021
2020
Proceedings of the IEEE International Symposium on Circuits and Systems, 2020
2019
IEEE Trans. Circuits Syst. I Regul. Pap., 2019
Nat. Mach. Intell., 2019
Nat. Mach. Intell., 2019
PUMA: A Programmable Ultra-efficient Memristor-based Accelerator for Machine Learning Inference.
Proceedings of the Twenty-Fourth International Conference on Architectural Support for Programming Languages and Operating Systems, 2019
Proceedings of the Handbook of Memristor Networks., 2019
Proceedings of the Handbook of Memristor Networks., 2019
2018
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018
2017
2016
IEEE Trans. Circuits Syst. I Regul. Pap., 2016
Proceedings of the 17th International Symposium on Quality Electronic Design, 2016
ISAAC: A Convolutional Neural Network Accelerator with In-Situ Analog Arithmetic in Crossbars.
Proceedings of the 43rd ACM/IEEE Annual International Symposium on Computer Architecture, 2016
Proceedings of the 2016 Design, Automation & Test in Europe Conference & Exhibition, 2016
Dot-product engine for neuromorphic computing: programming 1T1M crossbar to accelerate matrix-vector multiplication.
Proceedings of the 53rd Annual Design Automation Conference, 2016
Proceedings of the Twenty-First International Conference on Architectural Support for Programming Languages and Operating Systems, 2016
2015
2014
Proceedings of the IEEE International Symposium on Circuits and Systemss, 2014
2013
ACM J. Emerg. Technol. Comput. Syst., 2013
Proceedings of the 2013 IEEE International Symposium on Circuits and Systems (ISCAS2013), 2013
2012
Proceedings of the 2012 IEEE International Symposium on Circuits and Systems, 2012
2010
Nat., 2010
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010
2009
Proc. Natl. Acad. Sci. USA, 2009
2008
Two-stage Atomic Layer Deposition of Smooth Aluminum Oxide on Hydrophobic Self-assembled Monolayers.
Eng. Lett., 2008
2007
Defect Tolerance Based on Coding and Series Replication in Transistor-Logic Demultiplexer Circuits.
IEEE Trans. Circuits Syst. I Regul. Pap., 2007
2000
Proceedings of the IEEE International Symposium on Circuits and Systems, 2000
1993
The nanomanipulator: a virtual-reality interface for a scanning tunneling microscope.
Proceedings of the 20th Annual Conference on Computer Graphics and Interactive Techniques, 1993