R. S. Ashwin Kumar

Orcid: 0000-0001-8876-1469

According to our database1, R. S. Ashwin Kumar authored at least 11 papers between 2018 and 2024.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

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Bibliography

2024
Analysis of Stability, Noise, and Design Guidelines for a Cascaded Floating-Inverter Amplifier.
IEEE Trans. Circuits Syst. II Express Briefs, September, 2024

Flip-Around Level-Shifting For Switched-Capacitor Amplifiers to Improve the Closed-Loop Settling of Floating-Inverter Amplifiers.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2024

Low Noise Low Power Readout Circuit For Capacitance Based MEMS Accelerometers.
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2024

2022
Multi-Channel Analog-to-Digital Conversion Using a Delta-Sigma Modulator Without Reset and a Modulated-Sinc-Sum Filter.
IEEE Trans. Circuits Syst. I Regul. Pap., 2022

Analysis and Design of a Discrete-Time Delta-Sigma Modulator Using a Cascoded Floating-Inverter-Based Dynamic Amplifier.
IEEE J. Solid State Circuits, 2022

Using the Miller Theorem to Analyze Two-Stage Miller-Compensated Opamps.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2022

2021
Auto-Zeroing Static Phase Offset in DLLs Using a Digitally Programmable Sensing Circuit.
IEEE Trans. Circuits Syst. II Express Briefs, 2021

A Discrete-Time Delta-Sigma Modulator with Relaxed Driving Requirements And Improved Anti-Aliasing.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2021

2020
Multi-Channel Analog-to-Digital Conversion Techniques Using a Continuous-Time Delta-Sigma Modulator Without Reset.
IEEE Trans. Circuits Syst., 2020

2019
A 2-Channel ADC Using a Delta-Sigma Modulator Without Reset & a Modulated-Sinc-Sum Filter.
Proceedings of the 45th IEEE European Solid State Circuits Conference, 2019

2018
Reset-Free Memoryless Delta-Sigma Analog-to-Digital Conversion.
IEEE Trans. Circuits Syst. I Regul. Pap., 2018


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