R. Ramamurthy

According to our database1, R. Ramamurthy authored at least 4 papers between 2022 and 2024.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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PhD thesis 
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Links

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Bibliography

2024
Record Performance in GAA 2D NMOS and PMOS Using Monolayer MoS2 and WSe2 with Scaled Contact and Gate Length.
Proceedings of the IEEE Symposium on VLSI Technology and Circuits 2024, 2024

2023
Novel Cell Architectures with Back-side Transistor Contacts for Scaling and Performance.
Proceedings of the 2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits), 2023

A detailed comparison of various off-state breakdown methodologies for scaled Tri-gate technologies.
Proceedings of the IEEE International Reliability Physics Symposium, 2023

2022
Method to evaluate off-state breakdown in scaled Tri-gate technologies.
Proceedings of the IEEE International Reliability Physics Symposium, 2022


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