R.-Ming Shiu

According to our database, R.-Ming Shiu authored at least 6 papers between 1996 and 2001.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2001

Aggressive Schduling for Memory Accesses of CISC Superscalar Microprocessors.

R.-Ming Shiu, Hui-Yue Hwang, Jean Jyh-Jiun Shann

J. Inf. Sci. Eng., 2001

2000

Applying stack simulation for branch target buffers.

R.-Ming Shiu, Neng-Pin Lu, Chung-Ping Chung

J. Syst. Softw., 2000

1998

An X86 Load/Store Unit with Aggressive Scheduling of Load/Store Operations.

Hui-Yue Hwang, R.-Ming Shiu, Jean Jyh-Jiun Shann

Proceedings of the International Conference on Parallel and Distributed Systems, 1998

Decoding Unit with High Issue Rate for X86 Superscalar Microprocessors.

S.-K. Cheng, R.-Ming Shiu, Jean Jyh-Jiun Shann

Proceedings of the International Conference on Parallel and Distributed Systems, 1998

1997

Instruction Cache Prefetching with Extended BTB.

Shyh-An Chi, R.-Ming Shiu, Jih-Ching Chiu, Si-En Chang, Chung-Ping Chung

Proceedings of the 1997 International Conference on Parallel and Distributed Systems (ICPADS '97), 1997

1996

Register renaming for x86 superscalar design.

Chang-Chung Liu, R.-Ming Shiu, Chung-Ping Chung

Proceedings of the 1996 International Conference on Parallel and Distributed Systems (ICPADS '96), 1996