R. Dean Adams

According to our database, R. Dean Adams authored at least 13 papers between 1992 and 2004.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2004

An Integrated Memory Self Test and EDA Solution.

R. Dean Adams, Robert Abbott, Xiaoliang Bai, Dwayne Burek, Eric MacDonald

Proceedings of the 12th IEEE International Workshop on Memory Technology, 2004

2002

Design and Test of a 9-port SRAM for a 100Gb/s STS-1 Switch.

Robert Gibbins, R. Dean Adams, Thomas J. Eckenrode, Michael Ouellette, Yuejian Wu

Proceedings of the 10th IEEE International Workshop on Memory Technology, 2002

2001

Bitline contacts in high density SRAMs: design for testability and stressability.

Harold Pilo, R. Dean Adams, Robert E. Busch, Eric A. Nelson, Geoerge E. Rudgers

Proceedings of the Proceedings IEEE International Test Conference 2001, Baltimore, MD, USA, 30 October, 2001

Defect Analysis and a New Fault Model for Multi-port SRAMs.

Pradeep Nagaraj, Shambhu Upadhaya, Kamran Zarrineh, R. Dean Adams

Proceedings of the 16th IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2001), 2001

2000

Silicon-on-Insulator Technology Impacts on SRAM Testing.

R. Dean Adams, Phil Shephard III

Proceedings of the 18th IEEE VLSI Test Symposium (VTS 2000), 30 April, 2000

Defect Analysis and Realistic Fault Model Extensions for Static Random Access Memories.

Kamran Zarrineh, R. Dean Adams, Aneesha P. Deo

Proceedings of the 8th IEEE International Workshop on Memory Technology, 2000

Self test architecture for testing complex memory structures.

Kamran Zarrineh, R. Dean Adams, Thomas J. Eckenrode, Steven P. Gregor

Proceedings of the Proceedings IEEE International Test Conference 2000, 2000

1999

The Limits of Digital Testing for Dynamic Circuits.

R. Dean Adams, Edmond S. Cooley

Proceedings of the 17th IEEE VLSI Test Symposium (VTS '99), 1999

1998

Quad DCVS dynamic logic fault modeling and testing.

R. Dean Adams, Edmond S. Cooley, Patrick R. Hansen

Proceedings of the Proceedings IEEE International Test Conference 1998, 1998

1997

A Self-Test Circuit for Evaluating Memory Sense-Amplifier Signal.

R. Dean Adams, Edmond S. Cooley, Patrick R. Hansen

Proceedings of the Proceedings IEEE International Test Conference 1997, 1997

1995

Deterministic Self-Test of a High-Speed Embedded Memory and Logic Processor Subsystem.

Luigi Ternullo Jr., R. Dean Adams, John Connor, Garret S. Koch

Proceedings of the Proceedings IEEE International Test Conference 1995, 1995

A 370-MHz memory built-in self-test state machine.

R. Dean Adams, John Connor, Garret S. Koch, Luigi Ternullo Jr.

Proceedings of the 1995 European Design and Test Conference, 1995

1992

A 576 K 3.5-ns access BiCMOS ECL static RAM with array built-in self-test.

Henry A. Bonges III, R. Dean Adams, Archibald J. Allen, Roy Flaker, Kenneth S. Gray, Erik L. Hedberg, W. Timothy Holman, George M. Lattimore, David A. Lavalette, Kim Yen T. Nguyen, Alan L. Roberts

IEEE J. Solid State Circuits, April, 1992