R. Chandramouli

According to our database, R. Chandramouli authored at least 7 papers between 1985 and 2006.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2006

Session Abstract.

R. Chandramouli

Proceedings of the 24th IEEE VLSI Test Symposium (VTS 2006), 30 April, 2006

2005

Infrastructure IP design for repair in nanometer technologies.

R. Chandramouli

IEEE Des. Test Comput., 2005

Managing Test and Repair of Embedded Memory Subsystem in SoC.

R. Chandramouli

Proceedings of the 14th Asian Test Symposium (ATS 2005), 2005

2002

Integrating DFT in the Physical Synthesis Flow.

Loïs Guiller, Frederic Neuveux, S. Duggirala, R. Chandramouli, Rohit Kapur

Proceedings of the Proceedings IEEE International Test Conference 2002, 2002

2001

Strategies for Low-Cost Test.

Rohit Kapur, R. Chandramouli, Thomas W. Williams

IEEE Des. Test Comput., 2001

1988

CMOS Custom Implementation of the SPARC Architecture.

Masood Namjoo, F. Abu-Nofal, Doug Carmean, R. Chandramouli, Y. Chang, J. Goforth, W. Hsu, Rick Iwamoto, C. Murphy, U. Naot, Mike Parkin, Joan M. Pendleton, C. Porter, J. Reaves, R. Reddy, George Swan, D. Tinker, P. Tong, Larry Yang

Proceedings of the COMPCON'88, Digest of Papers, Thirty-Third IEEE Computer Society International Conference, San Francisco, California, USA, February 29, 1988

1985

Defect Analysis and Fault Modeling in MOS Technology.

R. Chandramouli, Hector R. Sucar

Proceedings of the Proceedings International Test Conference 1985, 1985