Qun Jane Gu
Orcid: 0000-0002-2825-6177
According to our database1,
Qun Jane Gu
authored at least 41 papers
between 2000 and 2024.
Collaborative distances:
Collaborative distances:
Timeline
2000
2005
2010
2015
2020
0
1
2
3
4
5
6
1
1
2
3
2
1
2
1
1
3
1
1
2
1
3
1
1
3
2
1
2
2
1
1
1
1
Legend:
Book In proceedings Article PhD thesis Dataset OtherLinks
On csauthors.net:
Bibliography
2024
IEEE Trans. Circuits Syst. II Express Briefs, December, 2024
2023
IEEE J. Solid State Circuits, May, 2023
A 1.6pJ/b 65Gb/s Si-Dielectric-Waveguide based Multi-Mode Multi-Drop sub-THz Interconnect in 65nm CMOS.
Proceedings of the IEEE Custom Integrated Circuits Conference, 2023
2021
IEEE J. Solid State Circuits, 2021
Analysis and Design of a 35-GHz Hybrid π-Network High-Gain Phase Shifter With 360° Continuous Phase Shifting.
IEEE Access, 2021
14.7 An Adaptive Analog Temperature-Healing Low-Power 17.7-to-19.2GHz RX Front-End with ±0.005dB/°C Gain Variation, <1.6dB NF Variation, and <2.2dB IP1dB Variation across -15 to 85°C for Phased-Array Receiver.
Proceedings of the IEEE International Solid-State Circuits Conference, 2021
Proceedings of the IEEE International Solid-State Circuits Conference, 2021
2020
J. Supercomput., 2020
IEEE J. Solid State Circuits, 2020
A 21-dm-OP<sub>1 dB</sub> 20.3%-Efficiency -131.8-dBm/Hz-Noise $X$ -Band Cartesian Error Feedback Transmitter With Fully Integrated Power Amplifier in 65-nm CMOS.
IEEE J. Solid State Circuits, 2020
An 8.3% Efficiency 96-134 GHz CMOS Frequency Doubler Using Distributed Amplifier and Nonlinear Transmission Line.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2020
2019
IEEE Trans. Circuits Syst. I Regul. Pap., 2019
Harmonic-Based Nonlinearity Factorization of Switching Behavior in Up-Conversion Mixers.
IEEE Trans. Circuits Syst. I Regul. Pap., 2019
A 140 GHz, 4 dB Noise-Figure Low-Noise Amplifier Design with the Compensation of Parasitic Capacitance CGS.
Proceedings of the 62nd IEEE International Midwest Symposium on Circuits and Systems, 2019
A 21dBm-OP1dB 20.3%-Efficiency -131.8dBm/Hz-Noise X-Band Cartesian-Error-Feedback Transmitter with Fully Integrated Power Amplifier in 65nm CMOS.
Proceedings of the IEEE International Solid- State Circuits Conference, 2019
Proceedings of the IEEE Custom Integrated Circuits Conference, 2019
2018
IEEE Trans. Circuits Syst. I Regul. Pap., 2018
Proceedings of the Optical Fiber Communications Conference and Exposition, 2018
2017
IEEE Trans. Circuits Syst. II Express Briefs, 2017
IEEE Trans. Circuits Syst. I Regul. Pap., 2017
Proceedings of the IEEE International Symposium on Circuits and Systems, 2017
2016
Improved message passing algorithms for resource allocation in two-tier femtocell networks.
Proceedings of the 27th IEEE Annual International Symposium on Personal, 2016
25.4 A 0.43K-noise-equivalent-ΔT 100GHz dicke-free radiometer with 100% time efficiency in 65nm CMOS.
Proceedings of the 2016 IEEE International Solid-State Circuits Conference, 2016
Reconfigurable blocker-tolerant RF front-end filter with tunable notch for active cancellation of transmitter leakage in FDD receivers.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2016
2015
Proceedings of the 2015 IEEE Radio and Wireless Symposium, 2015
Tunable N-path RF front-end filter with an adaptive integrated notch for FDD/co-existence.
Proceedings of the IEEE 58th International Midwest Symposium on Circuits and Systems, 2015
2014
Proceedings of the IEEE 57th International Midwest Symposium on Circuits and Systems, 2014
2012
IEEE Trans. Circuits Syst. II Express Briefs, 2012
A low-overhead self-healing embedded system for ensuring high yield and long-term sustainability of 60GHz 4Gb/s radio-on-a-chip.
Proceedings of the 2012 IEEE International Solid-State Circuits Conference, 2012
Proceedings of the 2012 IEEE International Solid-State Circuits Conference, 2012
2011
CMOS Prescaler(s) With Maximum 208-GHz Dividing Speed and 37-GHz Time-Interleaved Dual-Injection Locking Range.
IEEE Trans. Circuits Syst. II Express Briefs, 2011
A Low Phase Noise, Wideband and Compact CMOS PLL for Use in a Heterodyne 802.15.3c Transceiver.
IEEE J. Solid State Circuits, 2011
2010
A low phase noise, wideband and compact CMOS PLL for use in a heterodyne 802.15.3c TRX.
Proceedings of the 36th European Solid-State Circuits Conference, 2010
Proceedings of the IEEE Custom Integrated Circuits Conference, 2010
2008
A Low Power V-Band CMOS Frequency Divider With Wide Locking Range and Accurate Quadrature Output Phases.
IEEE J. Solid State Circuits, 2008
2007
Proceedings of the 2007 IEEE International Solid-State Circuits Conference, 2007
2006
A 60GHz CMOS VCO Using On-Chip Resonator with Embedded Artificial Dielectric for Size, Loss and Noise Reduction.
Proceedings of the 2006 IEEE International Solid State Circuits Conference, 2006
2004
A self-synchronized RF-interconnect for 3-dimensional integrated circuits.
Proceedings of the 2004 International Symposium on Circuits and Systems, 2004
2000
Proceedings of the IEEE International Conference on Acoustics, 2000