Quan Chen
Orcid: 0000-0001-5174-8762Affiliations:
- Southern University of Science and Technology, School of Microelectronics, Shenzhen, China
- University of Hong Kong, Department of Electrical and Electronic Engineering, Hong Kong (PhD 2010)
According to our database1,
Quan Chen
authored at least 28 papers
between 2008 and 2024.
Collaborative distances:
Collaborative distances:
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Bibliography
2024
FAT: Frequency-Aware Transformation for Bridging Full-Precision and Low-Precision Deep Representations.
IEEE Trans. Neural Networks Learn. Syst., February, 2024
On Model Order Reduction and Exponential Integrator for Transient Circuit Simulation.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., January, 2024
Analytical Modeling of Multiple Co-Existing Inaccuracies in RF Controlling Circuits for Superconducting Quantum Computing.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., January, 2024
2023
Analytical Post-Voiding Modeling and Efficient Characterization of EM Failure Effects Under Time-Dependent Current Stressing.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., December, 2023
TEMT: A Transient Electronic-Magnetic-Thermal-Coupled Simulation Framework for STT-MTJs.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., May, 2023
Multilayer Perceptron-Based Stress Evolution Analysis Under DC Current Stressing for Multisegment Wires.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., February, 2023
2022
A Space-Time Neural Network for Analysis of Stress Evolution Under DC Current Stressing.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022
EI-NK: A Robust Exponential Integrator Method With Singularity Removal and Newton-Raphson Iterations for Transient Nonlinear Circuit Simulation.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022
An Energy-Efficient Mixed-Bit CNN Accelerator With Column Parallel Readout for ReRAM-Based In-Memory Computing.
IEEE J. Emerg. Sel. Topics Circuits Syst., 2022
Multilayer Perceptron Based Stress Evolution Analysis under DC Current Stressing for Multi-segment Wires.
CoRR, 2022
2021
FAT: Learning Low-Bitwidth Parametric Representation via Frequency-Aware Transformation.
CoRR, 2021
2016
A fast time-domain EM-TCAD coupled simulation framework via matrix exponential with stiffness reduction.
Int. J. Circuit Theory Appl., 2016
2015
An approximate framework for quantum transport calculation with model order reduction.
J. Comput. Phys., 2015
An adaptive dynamical low-rank tensor approximation scheme for fast circuit simulation.
Proceedings of the 2015 IEEE 11th International Conference on ASIC, 2015
2014
Efficient matrix exponential method based on extended Krylov subspace for transient simulation of large-scale linear circuits.
Proceedings of the 19th Asia and South Pacific Design Automation Conference, 2014
2013
A Numerically Efficient Formulation for Time-Domain Electromagnetic-Semiconductor Cosimulation for Fast-Transient Systems.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2013
Fast transistor-level circuit simulation and variational analysis via the ultra-compact virtual source model.
Proceedings of the IEEE 10th International Conference on ASIC, 2013
2012
Globally stable, highly parallelizable fast transient circuit simulation via faber series.
Proceedings of the 10th IEEE International NEWCAS Conference, 2012
Circuit simulation via matrix exponential method for stiffness handling and parallel processing.
Proceedings of the 2012 IEEE/ACM International Conference on Computer-Aided Design, 2012
Proceedings of the 2012 IEEE/ACM International Conference on Computer-Aided Design, 2012
Efficient variation-aware EM-semiconductor coupled solver for the TSV structures in 3D IC.
Proceedings of the 2012 Design, Automation & Test in Europe Conference & Exhibition, 2012
2011
An Effective Formulation of Coupled Electromagnetic-TCAD Simulation for Extremely High Frequency Onward.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2011
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2011), 2011
Proceedings of the 16th Asia South Pacific Design Automation Conference, 2011
2009
Robust Simulation Methodology for Surface-Roughness Loss in Interconnect and Package Modelings.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2009
Efficient numerical modeling of random rough surface effects in interconnect resistance extraction.
Int. J. Circuit Theory Appl., 2009
Proceedings of the Design, Automation and Test in Europe, 2009
2008
Efficient numerical modeling of random rough surface effects for interconnect internal impedance extraction.
Proceedings of the 13th Asia South Pacific Design Automation Conference, 2008