Qirui Ren

According to our database, Qirui Ren authored at least 6 papers between 2018 and 2024.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2024

A 28-nm Computing-in-Memory-Based Super-Resolution Accelerator Incorporating Macro-Level Pipeline and Texture/Algebraic Sparsity.

Hao Wu, Yong Chen, Yiyang Yuan, Jinshan Yue, Xiangqu Fu, Qirui Ren, Qing Luo, Pui-In Mak, Xinghua Wang, Feng Zhang

IEEE Trans. Circuits Syst. I Regul. Pap., February, 2024

34.6 A 28nm 72.12TFLOPS/W Hybrid-Domain Outer-Product Based Floating-Point SRAM Computing-in-Memory Macro with Logarithm Bit-Width Residual ADC.

Yiyang Yuan, Yiming Yang, Xinghua Wang, Xiaoran Li, Cailian Ma, Qirui Chen, Meini Tang, Xi Wei, Zhixian Hou, Jialiang Zhu, Hao Wu, Qirui Ren, Guozhong Xing, Pui-In Mak, Feng Zhang

Proceedings of the IEEE International Solid-State Circuits Conference, 2024

2023

P³ ViT: A CIM-Based High-Utilization Architecture With Dynamic Pruning and Two-Way Ping-Pong Macro for Vision Transformer.

Xiangqu Fu, Qirui Ren, Hao Wu, Feibin Xiang, Qing Luo, Jinshan Yue, Yong Chen, Feng Zhang

IEEE Trans. Circuits Syst. I Regul. Pap., December, 2023

A Security-Enhanced, Charge-Pump-Free, ISO14443-A-/ISO10373-6-Compliant RFID Tag With 16.2-μW Embedded RRAM and Reconfigurable Strong PUF.

Qirui Ren, Qiang Huo, Zhisheng Chen, Qi Gao, Yiming Wang, Yiming Yang, Hao Wu, Xiangqu Fu, Xiaoxin Xu, Qing Luo, Jianfeng Gao, Chengying Chen, Xiaojin Zhao, Dengyun Lei, Xinghua Wang, Feng Zhang, Yong Chen, Pui-In Mak

IEEE Trans. Very Large Scale Integr. Syst., February, 2023

2022

A 13 µW Analog Front-End with RRAM-Based Lowpass FIR Filter for EEG Signal Detection.

Qirui Ren, Chengying Chen, Danian Dong, Xiaoxin Xu, Yong Chen, Feng Zhang

Sensors, 2022

2018

Efficient Patch-Wise Semantic Segmentation for Large-Scale Remote Sensing Images.

Yan Liu, Qirui Ren, Jiahui Geng, Meng Ding, Jiangyun Li

Sensors, 2018