Qingwen Wei

Orcid: 0009-0009-7047-7182

According to our database1, Qingwen Wei authored at least 5 papers between 2023 and 2024.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

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PhD thesis 
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Links

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Bibliography

2024
Timing Error Tolerant CNN Accelerator With Layerwise Approximate Multiplication.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., December, 2024

ChipExpert: The Open-Source Integrated-Circuit-Design-Specific Large Language Model.
CoRR, 2024

FDCA: Fine-grained Digital-CIM based CNN Accelerator with Hybrid Quantization and Weight-Stationary Dataflow.
Proceedings of the 61st ACM/IEEE Design Automation Conference, 2024

2023
An Energy-Efficient MAC Design with Error Compensation Using Hybrid Approximate Logic Synthesis.
Proceedings of the IEEE International Conference on Integrated Circuits, 2023

Work-in-Process: Error-Compensation-Based Energy-Efficient MAC Unit for CNNs.
Proceedings of the International Conference on Compilers, 2023


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