Qingjin Du
According to our database1,
Qingjin Du
authored at least 9 papers
between 2003 and 2009.
Collaborative distances:
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Bibliography
2009
A Low-Power, Fast Acquisition, Data Recovery Circuit With Digital Threshold Decision for SFI-5 Application.
IEEE Trans. Very Large Scale Integr. Syst., 2009
2007
Proceedings of the IEEE 2007 Custom Integrated Circuits Conference, 2007
2006
A Low-Phase Noise, Anti-Harmonic Programmable DLL Frequency Multiplier With Period Error Compensation for Spur Reduction.
IEEE Trans. Circuits Syst. II Express Briefs, 2006
A Timing Jitter Reduction Technique in a Cyclic Injection Clock Multiplier for Data Communication System.
Proceedings of the 2006 IEEE International SOC Conference, Austin, Texas, USA, 2006
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006
An Anti-Harmonic Locking, DLL Frequency Multiplier with Low Phase Noise and Reduced Spur.
Proceedings of the IEEE 2006 Custom Integrated Circuits Conference, 2006
Proceedings of the Canadian Conference on Electrical and Computer Engineering, 2006
2005
A 4-GB/S half-rate clock and data recovery circuit with a 3-stage VCO.
Proceedings of the Third IASTED International Conference on Circuits, 2005
2003
Proceedings of the IEEE Custom Integrated Circuits Conference, 2003