Qinggang Wang

Orcid: 0000-0002-9951-3345

According to our database¹, Qinggang Wang authored at least 27 papers between 2008 and 2024.

Collaborative distances:

Dijkstra number² of four.
Erdős number³ of four.

Timeline

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On csauthors.net:

Bibliography

2024

PhGraph: A High-Performance ReRAM-Based Accelerator for Hypergraph Applications.

[BibT_eX]

[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., May, 2024

An Efficient GCNs Accelerator Using 3D-Stacked Processing-in-Memory Architectures.

[BibT_eX]

[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., May, 2024

Towards High-Performance Graph Processing: From a Hardware/Software Co-Design Perspective.

[BibT_eX]

[DOI]

J. Comput. Sci. Technol., March, 2024

A Scalable, Efficient, and Robust Dynamic Memory Management Library for HLS-based FPGAs.

[BibT_eX]

[DOI]

Proceedings of the 57th IEEE/ACM International Symposium on Microarchitecture, 2024

High-Performance and Resource-Efficient Dynamic Memory Management in High-Level Synthesis.

[BibT_eX]

[DOI]

Proceedings of the 61st ACM/IEEE Design Automation Conference, 2024

2023

AFaVS: Accurate Yet Fast Version Switching for Graph Processing Systems.

[BibT_eX]

[DOI]

Proceedings of the 39th IEEE International Conference on Data Engineering, 2023

MeG<sup>2</sup>: In-Memory Acceleration for Genome Graphs Analysis.

[BibT_eX]

[DOI]

Proceedings of the 60th ACM/IEEE Design Automation Conference, 2023

2022

ReaDy: A ReRAM-Based Processing-in-Memory Accelerator for Dynamic Graph Convolutional Networks.

[BibT_eX]

[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022

A Data-Centric Accelerator for High-Performance Hypergraph Processing.

[BibT_eX]

[DOI]

Proceedings of the 55th IEEE/ACM International Symposium on Microarchitecture, 2022

A General Offloading Approach for Near-DRAM Processing-In-Memory Architectures.

[BibT_eX]

[DOI]

Proceedings of the 2022 IEEE International Parallel and Distributed Processing Symposium, 2022

Accelerating Sparse Deep Neural Network Inference Using GPU Tensor Cores.

[BibT_eX]

[DOI]

Proceedings of the IEEE High Performance Extreme Computing Conference, 2022

ScalaGraph: A Scalable Accelerator for Massively Parallel Graph Processing.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Symposium on High-Performance Computer Architecture, 2022

Hardware-Accelerated Hypergraph Processing with Chain-Driven Scheduling.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Symposium on High-Performance Computer Architecture, 2022

Accelerating Graph Convolutional Networks Using Crossbar-based Processing-In-Memory Architectures.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Symposium on High-Performance Computer Architecture, 2022

2021

FDGLib: A Communication Library for Efficient Large-Scale Graph Processing in FPGA-Accelerated Data Centers.

[BibT_eX]

[DOI]

J. Comput. Sci. Technol., 2021

Fast Sparse Deep Neural Network Inference with Flexible SpMM Optimization Space Exploration.

[BibT_eX]

[DOI]

Proceedings of the 2021 IEEE High Performance Extreme Computing Conference, 2021

Productive High-Performance k-Truss Decomposition on GPU Using Linear Algebra.

[BibT_eX]

[DOI]

Proceedings of the 2021 IEEE High Performance Extreme Computing Conference, 2021

GraSU: A Fast Graph Update Library for FPGA-based Dynamic Graph Processing.

[BibT_eX]

[DOI]

Proceedings of the FPGA '21: The 2021 ACM/SIGDA International Symposium on Field Programmable Gate Arrays, Virtual Event, USA, February 28, 2021

SumPA: Efficient Pattern-Centric Graph Mining with Pattern Abstraction.

[BibT_eX]

[DOI]

Proceedings of the 30th International Conference on Parallel Architectures and Compilation Techniques, 2021

2020

A Conflict-free Scheduler for High-performance Graph Processing on Multi-pipeline FPGAs.

[BibT_eX]

[DOI]

ACM Trans. Archit. Code Optim., 2020

Effective runtime scheduling for high-performance graph processing on heterogeneous dataflow architecture.

[BibT_eX]

[DOI]

CCF Trans. High Perform. Comput., 2020

Spara: An Energy-Efficient ReRAM-Based Accelerator for Sparse Graph Analytics Applications.

[BibT_eX]

[DOI]

Proceedings of the 2020 IEEE International Parallel and Distributed Processing Symposium (IPDPS), 2020

2018

Scalable concurrency debugging with distributed graph processing.

[BibT_eX]

[DOI]

Proceedings of the 2018 International Symposium on Code Generation and Optimization, 2018

2010

Distinguishing variance embedding.

[BibT_eX]

[DOI]

Qinggang Wang

Jianwei Li

Xuchu Wang

Image Vis. Comput., 2010

Some non-interior path-following methods based on a scaled central path for linear complementarity problems.

[BibT_eX]

[DOI]

Qinggang Wang

Jinling Zhao

Qingzhi Yang

Comput. Optim. Appl., 2010

2009

Combining local and global information for nonlinear dimensionality reduction.

[BibT_eX]

[DOI]

Qinggang Wang

Jianwei Li

Neurocomputing, 2009

2008

Determination of the Selection Statistics and Best Significance Level in Backward Stepwise Logistic Regression.

[BibT_eX]

[DOI]

Commun. Stat. Simul. Comput., 2008

Qinggang Wang

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