Qicheng Yu

According to our database1, Qicheng Yu authored at least 12 papers between 1994 and 2022.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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Links

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Bibliography

2022
Proactive Chatbot Framework Based on the PS2CLH Model: An AI-Deep Learning Chatbot Assistant for Students.
Proceedings of the Intelligent Systems and Applications, 2022

2017
A 12-b 10-GS/s Interleaved Pipeline ADC in 28-nm CMOS Technology.
IEEE J. Solid State Circuits, 2017

16.7 A 12b 10GS/s interleaved pipeline ADC in 28nm CMOS technology.
Proceedings of the 2017 IEEE International Solid-State Circuits Conference, 2017

2016
A 14-bit 2.5GS/s and 5GS/s RF sampling ADC with background calibration and dither.
Proceedings of the 2016 IEEE Symposium on VLSI Circuits, 2016

2014
Web service based Grid workflow application in quantitative remote sensing retrieval.
Proceedings of the 2014 IEEE Geoscience and Remote Sensing Symposium, 2014

2012
An agent-based adaptive join algorithm for building data warehouses.
PhD thesis, 2012

2006
A 2.5-Gb/s Multi-Rate 0.25-$\mu$m CMOS Clock and Data Recovery Circuit Utilizing a Hybrid Analog/Digital Loop Filter and All-Digital Referenceless Frequency Acquisition.
IEEE J. Solid State Circuits, 2006

1997
Efficient approximation of symbolic network functions using matroid intersection algorithms.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1997

1996
Generation of colour-constrained spanning trees with application in symbolic circuit analysis.
Int. J. Circuit Theory Appl., 1996

1995
Efficient Approximation of Symbolic Network Function Using Matroid Intersection Algorithms.
Proceedings of the 1995 IEEE International Symposium on Circuits and Systems, ISCAS 1995, Seattle, Washington, USA, April 30, 1995

1994
Approximate symbolic analysis of large analog integrated circuits.
Proceedings of the 1994 IEEE/ACM International Conference on Computer-Aided Design, 1994

Generation of color-constrained spanning trees with application in symbolic circuit analysis.
Proceedings of the Fourth Great Lakes Symposium on Design Automation of High Performance VLSI Systems, 1994


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