Qicheng Huang

According to our database, Qicheng Huang authored at least 22 papers between 2015 and 2023.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of three.

2023

Efficient Test Chip Design via Smart Computation.

Chenlei Fang, Qicheng Huang, Zeye Liu, Ruizhou Ding, Ronald D. Blanton

ACM Trans. Design Autom. Electr. Syst., March, 2023

Compound minirhizotron device for root phenotype and water content near root zone.

Lei Geng, Li Li, Wenyi Sheng, Quan Sun, Jiahao Yang, Qicheng Huang, Ping Lv

Comput. Electron. Agric., February, 2023

2021

Memory-Efficient Adaptive Test Pattern Reordering for Accurate Diagnosis.

Chenlei Fang, Qicheng Huang, R. D. Shawn Blanton

Proceedings of the 39th IEEE VLSI Test Symposium, 2021

2020

Towards Smarter Diagnosis: A Learning-based Diagnostic Outcome Previewer.

Qicheng Huang, Chenlei Fang, Soumya Mittal, R. D. (Shawn) Blanton

ACM Trans. Design Autom. Electr. Syst., 2020

Knowledge Transfer for Diagnosis Outcome Preview with Limited Data.

Qicheng Huang, Chenlei Fang, R. D. Shawn Blanton

Proceedings of the IEEE International Test Conference, 2020

LAIDAR: Learning for Accuracy and Ideal Diagnostic Resolution.

Qicheng Huang, Chenlei Fang, R. D. Shawn Blanton

Proceedings of the IEEE International Test Conference, 2020

Diagnosis Outcome Prediction on Limited Data via Transferred Random Forest.

Qicheng Huang, Chenlei Fang, R. D. Shawn Blanton

Proceedings of the IEEE International Test Conference in Asia, 2020

Adaptive Test Pattern Reordering for Diagnosis using k-Nearest Neighbors.

Chenlei Fang, Qicheng Huang, R. D. Shawn Blanton

Proceedings of the IEEE International Test Conference in Asia, 2020

2019

Diagnosis Outcome Preview through Learning.

Chenlei Fang, Qicheng Huang, Soumya Mittal, R. D. Shawn Blanton

Proceedings of the 37th IEEE VLSI Test Symposium, 2019

Improving Test Chip Design Efficiency via Machine Learning.

Zeye Liu, Qicheng Huang, Chenlei Fang, R. D. (Shawn) Blanton

Proceedings of the IEEE International Test Conference, 2019

IPSA: Integer Programming via Sparse Approximation for Efficient Test-Chip Design.

Qicheng Huang, Chenlei Fang, Zeye Liu, Ruizhou Ding, R. D. Shawn Blanton

Proceedings of the 37th IEEE International Conference on Computer Design, 2019

2018

一种云环境下的主机负载预测方法 (Workload Forecasting Method in Cloud).

Wei Jiang, Yuzhong Chen, Qicheng Huang, Zhanghui Liu, Genggeng Liu

计算机科学, 2018

Improving Diagnosis Efficiency via Machine Learning.

Qicheng Huang, Chenlei Fang, Soumya Mittal, R. D. Shawn Blanton

Proceedings of the IEEE International Test Conference, 2018

2016

An aggregating based model order reduction method for power grids.

Qicheng Huang, Xiao Li, Chenlei Fang, Fan Yang, Yangfeng Su, Xuan Zeng

Integr., 2016

High-speed link verification based on statistical inference.

Xuan Zeng, Chenlei Fang, Qicheng Huang, Fan Yang, Dian Zhou, Wei Cai, Weiping Shi

Proceedings of the IEEE International Symposium on Circuits and Systems, 2016

An improved delayed signal cancellation PLL for fast grid synchronization under distorted and unbalanced grid condition.

Qicheng Huang, Kaushik Rajashekara

Proceedings of the 2016 IEEE Industry Applications Society Annual Meeting, 2016

Efficient performance modeling via Dual-Prior Bayesian Model Fusion for analog and mixed-signal circuits.

Qicheng Huang, Chenlei Fang, Fan Yang, Xuan Zeng, Dian Zhou, Xin Li

Proceedings of the 53rd Annual Design Automation Conference, 2016

Efficient performance modeling of analog integrated circuits via kernel density based sparse regression.

Chenlei Fang, Qicheng Huang, Fan Yang, Xuan Zeng, Dian Zhou, Xin Li

Proceedings of the 53rd Annual Design Automation Conference, 2016

2015

Efficient bit error rate estimation for high-speed link by Bayesian model fusion.

Chenlei Fang, Qicheng Huang, Fan Yang, Xuan Zeng, Xin Li, Chenjie Gu

Proceedings of the 2015 Design, Automation & Test in Europe Conference & Exhibition, 2015

Efficient multivariate moment estimation via Bayesian model fusion for analog and mixed-signal circuits.

Qicheng Huang, Chenlei Fang, Fan Yang, Xuan Zeng, Xin Li

Proceedings of the 52nd Annual Design Automation Conference, 2015

PGMOR: An Efficient Model Order Reduction Method for Power Grids.

Qicheng Huang, Xiao Li, Chenlei Fang, Fan Yang, Yangfeng Su, Xuan Zeng

Proceedings of the 14th International Conference on Computer-Aided Design and Computer Graphics, 2015

SIPredict: Efficient post-layout waveform prediction via System Identification.

Qicheng Huang, Xiao Li, Fan Yang, Xuan Zeng, Xin Li

Proceedings of the 20th Asia and South Pacific Design Automation Conference, 2015