Qiaoyi Liu
Orcid: 0000-0003-1083-9953
According to our database1,
Qiaoyi Liu
authored at least 16 papers
between 2015 and 2024.
Collaborative distances:
Collaborative distances:
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Bibliography
2024
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., October, 2024
Amber: A 16-nm System-on-Chip With a Coarse- Grained Reconfigurable Array for Flexible Acceleration of Dense Linear Algebra.
IEEE J. Solid State Circuits, March, 2024
Onyx: A 12nm 756 GOPS/W Coarse-Grained Reconfigurable Array for Accelerating Dense and Sparse Applications.
Proceedings of the IEEE Symposium on VLSI Technology and Circuits 2024, 2024
Proceedings of the 36th IEEE Hot Chips Symposium, 2024
2023
Unified Buffer: Compiling Image Processing and Machine Learning Applications to Push-Memory Accelerators.
ACM Trans. Archit. Code Optim., June, 2023
AHA: An Agile Approach to the Design of Coarse-Grained Reconfigurable Accelerators and Compilers.
ACM Trans. Embed. Comput. Syst., March, 2023
2022
Amber: A 367 GOPS, 538 GOPS/W 16nm SoC with a Coarse-Grained Reconfigurable Array for Flexible Acceleration of Dense Linear Algebra.
Proceedings of the IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits 2022), 2022
Amber: Coarse-Grained Reconfigurable Array-Based SoC for Dense Linear Algebra Acceleration.
Proceedings of the 2022 IEEE Hot Chips 34 Symposium, 2022
2021
Proceedings of the Formal Methods in Computer Aided Design, 2021
2020
Proceedings of the 57th ACM/IEEE Design Automation Conference, 2020
Proceedings of the ASPLOS '20: Architectural Support for Programming Languages and Operating Systems, 2020
2018
Hardware Trojan Detection in Third-Party Digital Intellectual Property Cores by Multilevel Feature Analysis.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2018
2017
Proceedings of the 18th International Symposium on Quality Electronic Design, 2017
2015
Proceedings of the 2015 IEEE International Test Conference, 2015