Qiang Xu
Orcid: 0000-0001-6747-126XAffiliations:
- Chinese University of Hong Kong, Department of Computer Science and Engineering, Hong Kong
- McMaster University, Hamilton, ON, Canada (PhD 2005)
According to our database1,
Qiang Xu
authored at least 246 papers
between 2003 and 2025.
Collaborative distances:
Collaborative distances:
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Bibliography
2025
CoRR, February, 2025
DeepGate4: Efficient and Effective Representation Learning for Circuit Design at Scale.
CoRR, February, 2025
FGNN2: A Powerful Pretraining Framework for Learning the Logic Functionality of Circuits.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., January, 2025
DebugAgent: Efficient and Interpretable Error Slice Discovery for Comprehensive Model Debugging.
CoRR, January, 2025
Proceedings of the 30th Asia and South Pacific Design Automation Conference, 2025
2024
IEEE J. Emerg. Sel. Topics Circuits Syst., December, 2024
Self-Supervised Video Representation Learning via Capturing Semantic Changes Indicated by Saccades.
IEEE Trans. Circuits Syst. Video Technol., August, 2024
Spatial attention for human-centric visual understanding: An Information Bottleneck method.
Comput. Vis. Image Underst., 2024
MagicDriveDiT: High-Resolution Long Video Generation for Autonomous Driving with Adaptive Control.
CoRR, 2024
OriGen:Enhancing RTL Code Generation with Code-to-Code Augmentation and Self-Reflection.
CoRR, 2024
CoRR, 2024
CoRR, 2024
CoRR, 2024
CoRR, 2024
Evaluating Text-to-Image Generative Models: An Empirical Study on Human Image Synthesis.
CoRR, 2024
CoRR, 2024
Proceedings of the Advances in Neural Information Processing Systems 38: Annual Conference on Neural Information Processing Systems 2024, 2024
Proceedings of the Advances in Neural Information Processing Systems 38: Annual Conference on Neural Information Processing Systems 2024, 2024
Proceedings of the Advances in Neural Information Processing Systems 38: Annual Conference on Neural Information Processing Systems 2024, 2024
Be Your Own Neighborhood: Detecting Adversarial Examples by the Neighborhood Relations Built on Self-Supervised Learning.
Proceedings of the Forty-first International Conference on Machine Learning, 2024
Multi-Patch Prediction: Adapting Language Models for Time Series Representation Learning.
Proceedings of the Forty-first International Conference on Machine Learning, 2024
Proceedings of the Twelfth International Conference on Learning Representations, 2024
Proceedings of the Twelfth International Conference on Learning Representations, 2024
Proceedings of the Twelfth International Conference on Learning Representations, 2024
BrushNet: A Plug-and-Play Image Inpainting Model with Decomposed Dual-Branch Diffusion.
Proceedings of the Computer Vision - ECCV 2024, 2024
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2024
Proceedings of the IEEE/CVF Conference on Computer Vision and Pattern Recognition, 2024
DetDiffusion: Synergizing Generative and Perceptive Models for Enhanced Data Generation and Perception.
Proceedings of the IEEE/CVF Conference on Computer Vision and Pattern Recognition, 2024
2023
Proceedings of the Advances in Neural Information Processing Systems 36: Annual Conference on Neural Information Processing Systems 2023, 2023
Proceedings of the IEEE International Test Conference, 2023
Proceedings of the IEEE/CVF International Conference on Computer Vision, 2023
DiffGuard: Semantic Mismatch-Guided Out-of-Distribution Detection using Pre-trained Diffusion Models.
Proceedings of the IEEE/CVF International Conference on Computer Vision, 2023
Proceedings of the IEEE/ACM International Conference on Computer Aided Design, 2023
Proceedings of the IEEE/ACM International Conference on Computer Aided Design, 2023
Integrating Exact Simulation into Sweeping for Datapath Combinational Equivalence Checking.
Proceedings of the IEEE/ACM International Conference on Computer Aided Design, 2023
EXPERT: EXPloiting DRAM ERror Types to Improve the Effective Forecasting Coverage in the Field.
Proceedings of the 53rd Annual IEEE/IFIP International Conference on Dependable Systems and Networks, 2023
Proceedings of the 60th ACM/IEEE Design Automation Conference, 2023
Proceedings of the IEEE/CVF Conference on Computer Vision and Pattern Recognition, 2023
Proceedings of the Thirty-Seventh AAAI Conference on Artificial Intelligence, 2023
2022
CoRR, 2022
Be Your Own Neighborhood: Detecting Adversarial Example by the Neighborhood Relations Built on Self-Supervised Learning.
CoRR, 2022
SCINet: Time Series Modeling and Forecasting with Sample Convolution and Interaction.
Proceedings of the Advances in Neural Information Processing Systems 35: Annual Conference on Neural Information Processing Systems 2022, 2022
What You See is Not What the Network Infers: Detecting Adversarial Examples Based on Semantic Contradiction.
Proceedings of the 29th Annual Network and Distributed System Security Symposium, 2022
Proceedings of the IEEE International Test Conference, 2022
Proceedings of the ISSTA '22: 31st ACM SIGSOFT International Symposium on Software Testing and Analysis, Virtual Event, South Korea, July 18, 2022
Proceedings of the Tenth International Conference on Learning Representations, 2022
Proceedings of the Computer Vision - ECCV 2022, 2022
Proceedings of the Computer Vision - ECCV 2022, 2022
Proceedings of the Computer Vision, 2022
Proceedings of the DAC '22: 59th ACM/IEEE Design Automation Conference, San Francisco, California, USA, July 10, 2022
Proceedings of the DAC '22: 59th ACM/IEEE Design Automation Conference, San Francisco, California, USA, July 10, 2022
2021
Time Series is a Special Sequence: Forecasting with Sample Convolution and Interaction.
CoRR, 2021
MixDefense: A Defense-in-Depth Framework for Adversarial Example Detection Based on Statistical and Semantic Analysis.
CoRR, 2021
Proceedings of the 39th IEEE VLSI Test Symposium, 2021
Proceedings of the Advances in Neural Information Processing Systems 34: Annual Conference on Neural Information Processing Systems 2021, 2021
Proceedings of the IEEE International Test Conference, 2021
Proceedings of the Thirtieth International Joint Conference on Artificial Intelligence, 2021
Proceedings of the 2021 IEEE/CVF International Conference on Computer Vision, 2021
AppealNet: An Efficient and Highly-Accurate Edge/Cloud Collaborative Architecture for DNN Inference.
Proceedings of the 58th ACM/IEEE Design Automation Conference, 2021
Proceedings of the 14th International Congress on Image and Signal Processing, 2021
2020
ApproxIt: A Quality Management Framework of Approximate Computing for Iterative Methods.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020
Video super-resolution via pre-frame constrained and deep-feature enhanced sparse reconstruction.
Pattern Recognit., 2020
T-WaveNet: Tree-Structured Wavelet Neural Network for Sensor-Based Time Series Analysis.
CoRR, 2020
DeepFuse: An IMU-Aware Network for Real-Time 3D Human Pose Estimation from Multi-View Image.
Proceedings of the IEEE Winter Conference on Applications of Computer Vision, 2020
Proceedings of the GLSVLSI '20: Great Lakes Symposium on VLSI 2020, 2020
SRNet: Improving Generalization in 3D Human Pose Estimation with a Split-and-Recombine Approach.
Proceedings of the Computer Vision - ECCV 2020, 2020
Proceedings of the CCS '20: 2020 ACM SIGSAC Conference on Computer and Communications Security, 2020
2019
Energy-Efficient and Quality-Assured Approximate Computing Framework Using a Co-Training Method.
ACM Trans. Design Autom. Electr. Syst., 2019
CoRR, 2019
Lightweight prediction based big/little design for efficient neural network inference.
Proceedings of the 4th ACM/IEEE Symposium on Edge Computing, 2019
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2019
Proceedings of the 35th Annual Computer Security Applications Conference, 2019
2018
Hardware Trojan Detection in Third-Party Digital Intellectual Property Cores by Multilevel Feature Analysis.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2018
SERA: statistical error rate analysis for profit-oriented performance binning of resilient circuits.
Integr., 2018
Proceedings of the 51st Annual IEEE/ACM International Symposium on Microarchitecture, 2018
Invocation-driven neural approximate computing with a multiclass-classifier and multiple approximators.
Proceedings of the International Conference on Computer-Aided Design, 2018
Lookup table allocation for approximate computing with memory under quality constraints.
Proceedings of the 2018 Design, Automation & Test in Europe Conference & Exhibition, 2018
Structure-Aware 3D Hourglass Network for Hand Pose Estimation from Single Depth Image.
Proceedings of the British Machine Vision Conference 2018, 2018
I Know What You See: Power Side-Channel Attack on Convolutional Neural Network Accelerators.
Proceedings of the 34th Annual Computer Security Applications Conference, 2018
Towards Imperceptible and Robust Adversarial Example Attacks Against Neural Networks.
Proceedings of the Thirty-Second AAAI Conference on Artificial Intelligence, 2018
2017
Proceedings of the 18th International Symposium on Quality Electronic Design, 2017
Proceedings of the 2017 IEEE/ACM International Conference on Computer-Aided Design, 2017
Proceedings of the 2017 IEEE/ACM International Conference on Computer-Aided Design, 2017
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2017
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2017
Proceedings of the 54th Annual Design Automation Conference, 2017
Proceedings of the 22nd Asia and South Pacific Design Automation Conference, 2017
Proceedings of the 22nd Asia and South Pacific Design Automation Conference, 2017
2016
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2016
Proceedings of the 2016 Symposium on Spatial User Interaction, 2016
Proceedings of the 2016 IEEE International Test Conference, 2016
Proceedings of the 2016 International Symposium on Low Power Electronics and Design, 2016
Proceedings of the 34th IEEE International Conference on Computer Design, 2016
Proceedings of the 26th International Conference on Field Programmable Logic and Applications, 2016
Proceedings of the 2016 Euromicro Conference on Digital System Design, 2016
Proceedings of the 2016 ACM SIGSAC Conference on Computer and Communications Security, 2016
Proceedings of the 21st Asia and South Pacific Design Automation Conference, 2016
2015
IEEE Trans. Very Large Scale Integr. Syst., 2015
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2015
Proceedings of the 9th International Symposium on Networks-on-Chip, 2015
Proceedings of the 2015 IEEE International Test Conference, 2015
Yield and reliability enhancement for 3D ICs: Dissertation summary: IEEE TTTC E.J. McCluskey doctoral thesis award competition finalist.
Proceedings of the 2015 IEEE International Test Conference, 2015
On diagnosable and tunable 3D clock network design for lifetime reliability enhancement.
Proceedings of the 2015 IEEE International Test Conference, 2015
Proceedings of the 2015 Symposium on International Symposium on Physical Design, ISPD 2015, Monterey, CA, USA, March 29, 2015
Proceedings of the 33rd IEEE International Conference on Computer Design, 2015
Proceedings of the IEEE/ACM International Conference on Computer-Aided Design, 2015
Proceedings of the IEEE/ACM International Conference on Computer-Aided Design, 2015
Proceedings of the 25th edition on Great Lakes Symposium on VLSI, GLVLSI 2015, Pittsburgh, PA, USA, May 20, 2015
Proceedings of the 2015 Design, Automation & Test in Europe Conference & Exhibition, 2015
Proceedings of the 2015 Design, Automation & Test in Europe Conference & Exhibition, 2015
Proceedings of the 52nd Annual Design Automation Conference, 2015
DERA: yet another differential fault attack on cryptographic devices based on error rate analysis.
Proceedings of the 52nd Annual Design Automation Conference, 2015
Proceedings of the 20th Asia and South Pacific Design Automation Conference, 2015
Proceedings of the 20th Asia and South Pacific Design Automation Conference, 2015
2014
Lecture Notes in Electrical Engineering 252, Springer, ISBN: 978-3-319-00532-4, 2014
Learning-Based Power Management for Multicore Processors via Idle Period Manipulation.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2014
Real-time sign language recognition using RGBD stream: spatial-temporal feature exploration.
Proceedings of the 2nd ACM Symposium on Spatial User Interaction, 2014
Proceedings of the IEEE/ACM International Conference on Computer-Aided Design, 2014
Proceedings of the 2014 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2014
Proceedings of the 51st Annual Design Automation Conference 2014, 2014
On the Simulation of NBTI-Induced Performance Degradation Considering Arbitrary Temperature and Voltage Variations.
Proceedings of the 51st Annual Design Automation Conference 2014, 2014
DeTrust: Defeating Hardware Trust Verification with Stealthy Implicitly-Triggered Hardware Trojans.
Proceedings of the 2014 ACM SIGSAC Conference on Computer and Communications Security, 2014
2013
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2013
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2013
Proceedings of the IEEE 56th International Midwest Symposium on Circuits and Systems, 2013
AgentDiag: An agent-assisted diagnostic framework for board-level functional failures.
Proceedings of the 2013 IEEE International Test Conference, 2013
Proceedings of the International Symposium on Quality Electronic Design, 2013
Proceedings of the IEEE/ACM International Conference on Computer-Aided Design, 2013
Proceedings of the IEEE/ACM International Conference on Computer-Aided Design, 2013
Proceedings of the 2013 IEEE International Symposium on Hardware-Oriented Security and Trust, 2013
Proceedings of the 18th IEEE European Test Symposium, 2013
Proceedings of the 50th Annual Design Automation Conference 2013, 2013
InTimeFix: a low-cost and scalable technique for in-situ timing error masking in logic circuits.
Proceedings of the 50th Annual Design Automation Conference 2013, 2013
Proceedings of the 50th Annual Design Automation Conference 2013, 2013
Proceedings of the 50th Annual Design Automation Conference 2013, 2013
Proceedings of the 50th Annual Design Automation Conference 2013, 2013
2012
IEEE Trans. Very Large Scale Integr. Syst., 2012
Integrated Test-Architecture Optimization and Thermal-Aware Test Scheduling for 3-D SoCs Under Pre-Bond Test-Pin-Count Constraint.
IEEE Trans. Very Large Scale Integr. Syst., 2012
On X-Variable Filling and Flipping for Capture-Power Reduction in Linear Decompressor-Based Test Compression Environment.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2012
On Signal Selection for Visibility Enhancement in Trace-Based Post-Silicon Validation.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2012
Proceedings of the 2012 IEEE International Test Conference, 2012
Proceedings of the 2012 IEEE International Test Conference, 2012
Proceedings of the 2012 IEEE/ACM International Conference on Computer-Aided Design, 2012
HTOutlier: Hardware Trojan detection with side-channel signature outlier identification.
Proceedings of the 2012 IEEE International Symposium on Hardware-Oriented Security and Trust, 2012
Proceedings of the 2012 Design, Automation & Test in Europe Conference & Exhibition, 2012
Proceedings of the 2012 Design, Automation & Test in Europe Conference & Exhibition, 2012
Proceedings of the 49th Annual Design Automation Conference 2012, 2012
Proceedings of the 17th Asia and South Pacific Design Automation Conference, 2012
Learning-based power management for multi-core processors via idle period manipulation.
Proceedings of the 17th Asia and South Pacific Design Automation Conference, 2012
Proceedings of the 17th Asia and South Pacific Design Automation Conference, 2012
2011
On Task Allocation and Scheduling for Lifetime Extension of Platform-Based MPSoC Designs.
IEEE Trans. Parallel Distributed Syst., 2011
Pseudo-functional testing for small delay defects considering power supply noise effects.
Proceedings of the 2011 IEEE/ACM International Conference on Computer-Aided Design, 2011
Proceedings of the 2011 IEEE/ACM International Conference on Computer-Aided Design, 2011
Proceedings of the International Conference on Field Programmable Logic and Applications, 2011
On timing yield improvement for FPGA designs using architectural symmetry (abstract only).
Proceedings of the ACM/SIGDA 19th International Symposium on Field Programmable Gate Arrays, 2011
Proceedings of the 16th European Test Symposium, 2011
Proceedings of the Design, Automation and Test in Europe, 2011
Proceedings of the 48th Design Automation Conference, 2011
Proceedings of the 48th Design Automation Conference, 2011
Proceedings of the 9th International Conference on Hardware/Software Codesign and System Synthesis, 2011
Proceedings of the 16th Asia South Pacific Design Automation Conference, 2011
2010
X-Filling for Simultaneous Shift- and Capture-Power Reduction in At-Speed Scan-Based Testing.
IEEE Trans. Very Large Scale Integr. Syst., 2010
Lifetime Reliability for Load-Sharing Redundant Systems With Arbitrary Failure Distributions.
IEEE Trans. Reliab., 2010
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2010
Proceedings of the 2011 IEEE International Test Conference, 2010
Proceedings of the 2010 International Conference on Computer-Aided Design, 2010
Proceedings of the 2010 International Conference on Computer-Aided Design, 2010
Characterizing the lifetime reliability of manycore processors with core-level redundancy.
Proceedings of the 2010 International Conference on Computer-Aided Design, 2010
Proceedings of the International Conference on Field-Programmable Technology, 2010
Proceedings of the International Conference on Field-Programmable Technology, 2010
Layout-aware pseudo-functional testing for critical paths considering power supply noise effects.
Proceedings of the Design, Automation and Test in Europe, 2010
Energy-efficient task allocation and scheduling for multi-mode MPSoCs under lifetime reliability constraint.
Proceedings of the Design, Automation and Test in Europe, 2010
AgeSim: A simulation framework for evaluating the lifetime reliability of processor-based SoCs.
Proceedings of the Design, Automation and Test in Europe, 2010
Performance yield-driven task allocation and scheduling for MPSoCs under process variation.
Proceedings of the 47th Design Automation Conference, 2010
On Signal Tracing for Debugging Speedpath-Related Electrical Errors in Post-Silicon Validation.
Proceedings of the 19th IEEE Asian Test Symposium, 2010
Proceedings of the 15th Asia South Pacific Design Automation Conference, 2010
2009
On Topology Reconfiguration for Defect-Tolerant NoC-Based Homogeneous Manycore Systems.
IEEE Trans. Very Large Scale Integr. Syst., 2009
SOC test-architecture optimization for the testing of embedded cores and signal-integrity faults on core-external interconnects.
ACM Trans. Design Autom. Electr. Syst., 2009
Low-Power Scan Testing for Test Data Compression Using a Routing-Driven Scan Architecture.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2009
Proceedings of the 2009 IEEE International Test Conference, 2009
Proceedings of the 2009 IEEE International Test Conference, 2009
On simultaneous shift- and capture-power reduction in linear decompressor-based test compression environment.
Proceedings of the 2009 IEEE International Test Conference, 2009
Proceedings of the 2009 IEEE International Test Conference, 2009
Layout-driven test-architecture design and optimization for 3D SoCs under pre-bond test-pin-count constraint.
Proceedings of the 2009 International Conference on Computer-Aided Design, 2009
A generic framework for scan capture power reduction in fixed-length symbol-based test compression environment.
Proceedings of the Design, Automation and Test in Europe, 2009
Proceedings of the Design, Automation and Test in Europe, 2009
Proceedings of the Design, Automation and Test in Europe, 2009
Proceedings of the Design, Automation and Test in Europe, 2009
Proceedings of the 46th Design Automation Conference, 2009
Proceedings of the 46th Design Automation Conference, 2009
Test Pattern Selection for Potentially Harmful Open Defects in Power Distribution Networks.
Proceedings of the Eighteentgh Asian Test Symposium, 2009
2008
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2008
Proceedings of the 14th IEEE Pacific Rim International Symposium on Dependable Computing, 2008
SoC Test Architecture Design and Optimization Considering Power Supply Noise Effects.
Proceedings of the 2008 IEEE International Test Conference, 2008
A Generic Framework for Scan Capture Power Reduction in Test Compression Environment.
Proceedings of the 2008 IEEE International Test Conference, 2008
Is It Cost-Effective to Achieve Very High Fault Coverage for Testing Homogeneous SoCs with Core-Level Redundancy?
Proceedings of the 2008 IEEE International Test Conference, 2008
Proceedings of the 2008 International Conference on Computer-Aided Design, 2008
Channel Width Utilization Improvement in Testing NoC-Based Systems for Test Time Reduction.
Proceedings of the 4th IEEE International Symposium on Electronic Design, 2008
Defect Tolerance in Homogeneous Manycore Processors Using Core-Level Redundancy with Unified Topology.
Proceedings of the Design, Automation and Test in Europe, 2008
Proceedings of the Design, Automation and Test in Europe, 2008
Proceedings of the Design, Automation and Test in Europe, 2008
iFill: An Impact-Oriented X-Filling Method for Shift- and Capture-Power Reduction in At-Speed Scan-Based Testing.
Proceedings of the Design, Automation and Test in Europe, 2008
Proceedings of the 45th Design Automation Conference, 2008
On Reusing Test Access Mechanisms for Debug Data Transfer in SoC Post-Silicon Validation.
Proceedings of the 17th IEEE Asian Test Symposium, 2008
A debug probe for concurrently debugging multiple embedded cores and inter-core transactions in NoC-based systems.
Proceedings of the 13th Asia South Pacific Design Automation Conference, 2008
Proceedings of the 13th Asia South Pacific Design Automation Conference, 2008
2007
Test Wrapper Design and Optimization Under Power Constraints for Embedded Cores With Multiple Clock Domains.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2007
IET Comput. Digit. Tech., 2007
Test-wrapper designs for the detection of signal-integrity faults on core-external interconnects of SoCs.
Proceedings of the 2007 IEEE International Test Conference, 2007
Proceedings of the 2007 IEEE International Test Conference, 2007
Proceedings of the 2007 Design, Automation and Test in Europe Conference and Exposition, 2007
SOC Test Architecture Optimization for Signal Integrity Faults on Core-External Interconnects.
Proceedings of the 44th Design Automation Conference, 2007
2006
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2006
IEEE Trans. Computers, 2006
Proceedings of the 11th European Test Symposium, 2006
Proceedings of the 15th Asian Test Symposium, 2006
2005
IEEE Trans. Very Large Scale Integr. Syst., 2005
IEEE Trans. Very Large Scale Integr. Syst., 2005
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2005
Proceedings of the Proceedings 2005 IEEE International Test Conference, 2005
Multi-frequency wrapper design and optimization for embedded cores under average power constraints.
Proceedings of the 42nd Design Automation Conference, 2005
Proceedings of the 2005 Conference on Asia South Pacific Design Automation, 2005
2004
Proceedings of the Proceedings 2004 International Test Conference (ITC 2004), 2004
Proceedings of the 2004 Design, 2004
Proceedings of the 13th Asian Test Symposium (ATS 2004), 2004
2003
Proceedings of the Proceedings 2003 International Test Conference (ITC 2003), Breaking Test Interface Bottlenecks, 28 September, 2003
Proceedings of the 2003 International Conference on Computer-Aided Design, 2003
Proceedings of the 2003 Design, 2003