Qiang Liu

According to our database, Qiang Liu authored at least 89 papers between 2006 and 2024.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2024

Acceleration of Multi-Body Molecular Dynamics With Customized Parallel Dataflow.

Quan Deng, Qiang Liu, Ming Yuan, Xiaohui Duan, Lin Gan, Jinzhe Yang, Wenlai Zhao, Zhenxiang Zhang, Guiming Wu, Wayne Luk, Haohuan Fu, Guangwen Yang

IEEE Trans. Parallel Distributed Syst., December, 2024

HNMC: Hybrid Near-Memory Computing Circuit for Neural Network Acceleration.

Xiyan Liu, Qiang Liu

IEEE Trans. Circuits Syst. II Express Briefs, November, 2024

Modular-Based Compression Scheme for Address Data in the Blockchain System for IoV Applications.

Zhaohui Guo, Qiang Liu, Zhen Gao, Lei Liu, Yi Gong, Ximeng Liu, Neeraj Kumar, Mohsen Guizani

IEEE Trans. Veh. Technol., October, 2024

AQA: An Adaptive Post-Training Quantization Method for Activations of CNNs.

Yun Wang, Qiang Liu

IEEE Trans. Computers, August, 2024

An Efficient FPGA-based Depthwise Separable Convolutional Neural Network Accelerator with Hardware Pruning.

Zhengyan Liu, Qiang Liu, Shun Yan, Ray C. C. Cheung

ACM Trans. Reconfigurable Technol. Syst., March, 2024

Verkle-Accumulator-Based Stateless Transaction Validation (VA-STV) Scheme for the Blockchain-Based IoT Network.

Zhaohui Guo, Zhen Gao, Qiang Liu, Lei Liu, Mianxiong Dong, Ning Zhang, Mohammed Atiquzzaman

IEEE Internet Things J., January, 2024

Corki: Enabling Real-time Embodied AI Robots via Algorithm-Architecture Co-Design.

Yiyang Huang, Yuhui Hao, Bo Yu, Feng Yan, Yuxin Yang, Feng Min, Yinhe Han, Lin Ma, Shaoshan Liu, Qiang Liu, Yiming Gan

CoRR, 2024

A DRAM Chip Protection Method Against EMFI Based on PHOTON Hash.

Longtao Guo, Qiang Liu

Proceedings of the IEEE International Test Conference in Asia, 2024

A Data-Distribution Aware Approximate Multiplier Design Based on FPGA.

Mingyu Shu, Yingchang Mao, Qiang Liu

Proceedings of the IEEE International Symposium on Circuits and Systems, 2024

ORIANNA: An Accelerator Generation Framework for Optimization-based Robotic Applications.

Yuhui Hao, Yiming Gan, Bo Yu, Qiang Liu, Yinhe Han, Zishen Wan, Shaoshan Liu

Proceedings of the 29th ACM International Conference on Architectural Support for Programming Languages and Operating Systems, 2024

MSCA: A Multi-Grained Sparse Convolution Accelerator for DNN Training.

Yingchang Mao, Qiang Liu, Ray C. C. Cheung

Proceedings of the 35th IEEE International Conference on Application-specific Systems, 2024

2023

Guest Editorial Special Issue on the Asian Hardware Oriented Security and Trust Symposium (AsianHOST 2022).

Chip-Hong Chang, Pingqiang Zhou, Yuan Cao, Qiang Liu

IEEE Trans. Circuits Syst. I Regul. Pap., December, 2023

Efficient Protection of FPGA Implemented LDPC Decoders Against Single Event Upsets (SEUs) on Configuration Memories.

Zhen Gao, Yinghao Cheng, Qiang Liu, Anees Ullah, Pedro Reviriego

IEEE Trans. Circuits Syst. I Regul. Pap., September, 2023

An Energy Efficient and Runtime Reconfigurable Accelerator for Robotic Localization.

Qiang Liu, Yuhui Hao, Weizhuang Liu, Bo Yu, Yiming Gan, Jie Tang, Shaoshan Liu, Yuhao Zhu

IEEE Trans. Computers, July, 2023

A Methodology for the Design of Fault Tolerant Parallel Digital Channelizers on SRAM-FPGAs.

Zhen Gao, Jiajun Xiao, Qiang Liu, Anees Ullah, Pedro Reviriego

IEEE Trans. Circuits Syst. I Regul. Pap., May, 2023

Introduction to Special Section on FPT'20.

Oliver Sinnen, Qiang Liu, Azadeh Davoodi

ACM Trans. Reconfigurable Technol. Syst., March, 2023

Reliability Evaluation and Fault Tolerance Design for FPGA Implemented Reed Solomon (RS) Erasure Decoders.

Zhen Gao, Jinchang Shi, Qiang Liu, Anees Ullah, Pedro Reviriego

IEEE Trans. Very Large Scale Integr. Syst., 2023

FGLQR: Factor Graph Accelerator of LQR Control for Autonomous Machines.

Yuhui Hao, Bo Yu, Qiang Liu, Shaoshan Liu

CoRR, 2023

An Adaptive Quantization Method for CNN Activations.

Yun Wang, Qiang Liu

Proceedings of the IEEE International Symposium on Circuits and Systems, 2023

A Portable DSP Coprocessor Design Using RISC-V Packed-SIMD Instructions.

Kai Li, Wei Yin, Qiang Liu

Proceedings of the IEEE International Symposium on Circuits and Systems, 2023

Fault Model Analysis of DRAM under Electromagnetic Fault Injection Attack.

Qiang Liu, Longtao Guo, Honghui Tang

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2023

BLITZCRANK: Factor Graph Accelerator for Motion Planning.

Yuhui Hao, Yiming Gan, Bo Yu, Qiang Liu, Shaoshan Liu, Yuhao Zhu

Proceedings of the 60th ACM/IEEE Design Automation Conference, 2023

2022

Fault Injection Attack Emulation Framework for Early Evaluation of IC Designs.

Qiang Liu, Honghui Tang, Peiran Zhang

ACM Trans. Design Autom. Electr. Syst., 2022

RNS-Based Adaptive Compression Scheme for the Block Data in the Blockchain for IIoT.

Zhaohui Guo, Zhen Gao, Qiang Liu, Chinmay Chakraborty, Qiaozhi Hua, Keping Yu, Shaohua Wan

IEEE Trans. Ind. Informatics, 2022

MPFA: An Efficient Multiple Faults-Based Persistent Fault Analysis Method for Low-Cost FIA.

Honghui Tang, Qiang Liu

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022

Factor Graph Accelerator for LiDAR-Inertial Odometry.

Yuhui Hao, Bo Yu, Qiang Liu, Shaoshan Liu, Yuhao Zhu

CoRR, 2022

In-depth Analysis of the Effects of Electromagnetic Fault Injection Attack on a 32-bit MCU.

Jinteng Jiao, He Li, Yanzhao Feng, Chengdong Qian, Qiang Liu

Proceedings of the 35th IEEE International System-on-Chip Conference, 2022

Factor Graph Accelerator for LiDAR-Inertial Odometry (Invited Paper).

Yuhui Hao, Bo Yu, Qiang Liu, Shaoshan Liu, Yuhao Zhu

Proceedings of the 41st IEEE/ACM International Conference on Computer-Aided Design, 2022

LCAM: Low-Cost Approximate Multiplier Design on FPGA.

Mingyu Shu, Qiang Liu

Proceedings of the International Conference on Field-Programmable Technology, 2022

DQI: A Dynamic Quantization Method for Efficient Convolutional Neural Network Inference Accelerators.

Yun Wang, Qiang Liu, Shun Yan

Proceedings of the 30th IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2022

An Energy-Efficient and Runtime-Reconfigurable FPGA-Based Accelerator for Robotic Localization Systems.

Qiang Liu, Zishen Wan, Bo Yu, Weizhuang Liu, Shaoshan Liu, Arijit Raychowdhury

Proceedings of the IEEE Custom Integrated Circuits Conference, 2022

FPGA-Accelerated Tersoff Multi-body Potential for Molecular Dynamics Simulations.

Ming Yuan, Qiang Liu, Quan Deng, Shengye Xiang, Lin Gan, Jinzhe Yang, Xiaohui Duan, Haohuan Fu, Guangwen Yang

Proceedings of the Applied Reconfigurable Computing. Architectures, Tools, and Applications, 2022

2021

Adversarial Hardware With Functional and Topological Camouflage.

He Li, Ameer Abdelhadi, Runbin Shi, Jiliang Zhang, Qiang Liu

IEEE Trans. Circuits Syst. II Express Briefs, 2021

Experimental Verification of EMPA Fault Mechanism.

Maoshen Zhang, Qiang Liu

Proceedings of the IEEE/ACM International Symposium on Nanoscale Architectures, 2021

Archytas: A Framework for Synthesizing and Dynamically Optimizing Accelerators for Robotic Localization.

Weizhuang Liu, Bo Yu, Yiming Gan, Qiang Liu, Jie Tang, Shaoshan Liu, Yuhao Zhu

Proceedings of the MICRO '21: 54th Annual IEEE/ACM International Symposium on Microarchitecture, 2021

A Digital and Lightweight Delay-Based Detector against Fault Injection Attacks.

Maoshen Zhang, Qiang Liu

Proceedings of the IEEE International Symposium on Circuits and Systems, 2021

Lightweight and Configurable Synchronizer and Demodulator Design for PDSCH on FPGA.

Chongguang Yao, Qiang Liu, Linan Wang, Qingye Zhang, Honghui Tang, Maoshen Zhang

Proceedings of the IEEE International Symposium on Circuits and Systems, 2021

Eudoxus: Characterizing and Accelerating Localization in Autonomous Machines Industry Track Paper.

Yiming Gan, Bo Yu, Boyuan Tian, Leimeng Xu, Wei Hu, Shaoshan Liu, Qiang Liu, Yanjun Zhang, Jie Tang, Yuhao Zhu

Proceedings of the IEEE International Symposium on High-Performance Computer Architecture, 2021

An FPGA-based MobileNet Accelerator Considering Network Structure Characteristics.

Shun Yan, Zhengyan Liu, Yun Wang, Chenglong Zeng, Qiang Liu, Bowen Cheng, Ray C. C. Cheung

Proceedings of the 31st International Conference on Field-Programmable Logic and Applications, 2021

2020

$\pi$π-BA: Bundle Adjustment Hardware Accelerator Based on Distribution of 3D-Point Observations.

Qiang Liu, Shuzhen Qin, Bo Yu, Jie Tang, Shaoshan Liu

IEEE Trans. Computers, 2020

Eudoxus: Characterizing and Accelerating Localization in Autonomous Machines.

Yiming Gan, Yu Bo, Boyuan Tian, Leimeng Xu, Wei Hu, Shaoshan Liu, Qiang Liu, Yanjun Zhang, Jie Tang, Yuhao Zhu

CoRR, 2020

Peak Detection Based on FPGA Using Quasi-Newton Optimization Method for Femtosecond Laser Ranging.

Yu Jiang, Qiang Liu, Hui Cao, Youjian Song

IEEE Access, 2020

2019

PI-BA Bundle Adjustment Acceleration on Embedded FPGAs with Co-observation Optimization.

Shuzhen Qin, Qiang Liu, Bo Yu, Shaoshan Liu

CoRR, 2019

Heterogeneous Acceleration of Hybrid PSO-QN Algorithm for Neural Network Training.

Shun Yan, Qiang Liu, Jiajun Li, Liang Han

IEEE Access, 2019

A Hardware Trojan Detection Method Based on Structural Features of Trojan and Host Circuits.

Qiang Liu, Pengyong Zhao, Fuqiang Chen

IEEE Access, 2019

Information Theory-Based Quantitative Evaluation Method for Countermeasures Against Fault Injection Attacks.

Qiang Liu, Bo Ning, Pengjie Deng

IEEE Access, 2019

π-BA: Bundle Adjustment Acceleration on Embedded FPGAs with Co-observation Optimization.

Shuzhen Qin, Qiang Liu, Bo Yu, Shaoshan Liu

Proceedings of the 27th IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2019

Density-based Clustering Method for Hardware Trojan Detection Based on Gate-level Structural Features.

Pengyong Zhao, Qiang Liu

Proceedings of the Asian Hardware Oriented Security and Trust Symposium, 2019

2018

Fast Neural Network Training on FPGA Using Quasi-Newton Optimization Method.

Qiang Liu, Jia Liu, Ruoyu Sang, Jiajun Li, Tao Zhang, Qijun Zhang

IEEE Trans. Very Large Scale Integr. Syst., 2018

A Low Cost Partial Scan Approach Based on Balanced Sequential Graph Transformation.

Tao Li, Qiang Liu

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2018

Signal word-level statistical properties-based activation approach for hardware Trojan detection in DSP circuits.

He Li, Qiang Liu, Fuqiang Chen

IET Comput. Digit. Tech., 2018

2017

Neural Network Training Acceleration with PSO Algorithm on a GPU Using OpenCL.

Jiajun Li, Qiang Liu

Proceedings of the 8th International Symposium on Highly Efficient Accelerators and Reconfigurable Technologies, 2017

F-C3D: FPGA-based 3-dimensional convolutional neural network.

Hongxiang Fan, Xinyu Niu, Qiang Liu, Wayne Luk

Proceedings of the 27th International Conference on Field Programmable Logic and Applications, 2017

Optimizing CNN-Based Object Detection Algorithms on Embedded FPGA Platforms.

Ruizhe Zhao, Xinyu Niu, Yajie Wu, Wayne Luk, Qiang Liu

Proceedings of the Applied Reconfigurable Computing - 13th International Symposium, 2017

2016

Accuracy Improvement of Energy Prediction for Solar-Energy-Powered Embedded Systems.

Qiang Liu, Qijun Zhang

IEEE Trans. Very Large Scale Integr. Syst., 2016

IP Protection of Mesh NoCs Using Square Spiral Routing.

Qiang Liu, Wenqing Ji, Qi Chen, Terrence S. T. Mak

IEEE Trans. Very Large Scale Integr. Syst., 2016

Knowledge-Based Neural Network Model for FPGA Logical Architecture Development.

Qiang Liu, Ming Gao, Qijun Zhang

IEEE Trans. Very Large Scale Integr. Syst., 2016

A survey of hardware Trojan threat and defense.

He Li, Qiang Liu, Jiliang Zhang

Integr., 2016

IC security evaluation against fault injection attack based on FPGA emulation.

Song Xu, Qiang Liu, Tao Li, Hongxiang Fan

Proceedings of the 2016 International Conference on Field-Programmable Technology, 2016

Cost Effective Partial Scan for Hardware Emulation.

Tao Li, Qiang Liu

Proceedings of the 24th IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2016

2015

Power-Adaptive Computing System Design for Solar-Energy-Powered Embedded Systems.

Qiang Liu, Terrence S. T. Mak, Tao Zhang, Xinyu Niu, Wayne Luk, Alex Yakovlev

IEEE Trans. Very Large Scale Integr. Syst., 2015

Automating Elimination of Idle Functions by Runtime Reconfiguration.

Xinyu Niu, Thomas C. P. Chau, Qiwei Jin, Wayne Luk, Qiang Liu, Oliver Pell

ACM Trans. Reconfigurable Technol. Syst., 2015

Pipelined NoC router architecture design with buffer configuration exploration on FPGA.

Qi Chen, Qiang Liu

Proceedings of the 25th International Conference on Field Programmable Logic and Applications, 2015

A Survey of Hardware Trojan Detection, Diagnosis and Prevention.

He Li, Qiang Liu, Jiliang Zhang, Yongqiang Lyu

Proceedings of the 14th International Conference on Computer-Aided Design and Computer Graphics, 2015

2014

Comments on "Algorithmic Aspects of Hardware/Software Partitioning: 1D Search Algorithms".

Hao-Jun Quan, Tao Zhang, Qiang Liu, Jichang Guo, Xiaochen Wang, Ruimin Hu

IEEE Trans. Computers, 2014

Hardware Trojan detection acceleration based on word-level statistical properties management.

He Li, Qiang Liu

Proceedings of the 2014 International Conference on Field-Programmable Technology, 2014

2013

Automating resource optimisation in reconfigurable design (abstract only).

Xinyu Niu, Thomas C. P. Chau, Qiwei Jin, Wayne Luk, Qiang Liu

Proceedings of the 2013 ACM/SIGDA International Symposium on Field Programmable Gate Arrays, 2013

Automating Elimination of Idle Functions by Run-Time Reconfiguration.

Xinyu Niu, Thomas C. P. Chau, Qiwei Jin, Wayne Luk, Qiang Liu

Proceedings of the 21st IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2013

2012

Automated Mapping of the MapReduce Pattern onto Parallel Computing Platforms.

Qiang Liu, Tim Todman, Wayne Luk, George A. Constantinides

J. Signal Process. Syst., 2012

Optimizing Hardware Design by Composing Utility-Directed Transformations.

Qiang Liu, Tim Todman, Wayne Luk, George A. Constantinides

IEEE Trans. Computers, 2012

Neural network based pre-placement wirelength estimation.

Qiang Liu, Jianguo Ma, Qijun Zhang

Proceedings of the 2012 International Conference on Field-Programmable Technology, 2012

Exploiting run-time reconfiguration in stencil computation.

Xinyu Niu, Qiwei Jin, Wayne Luk, Qiang Liu, Oliver Pell

Proceedings of the 22nd International Conference on Field Programmable Logic and Applications (FPL), 2012

Heterogeneous Systems for Energy Efficient Scientific Computing.

Qiang Liu, Wayne Luk

Proceedings of the Reconfigurable Computing: Architectures, Tools and Applications, 2012

2011

Compiling C-like Languages to FPGA Hardware: Some Novel Approaches Targeting Data Memory Organization.

Qiang Liu, George A. Constantinides, Konstantinos Masselos, Peter Y. K. Cheung

Comput. J., 2011

Power adaptive computing system design in energy harvesting environment.

Qiang Liu, Terrence S. T. Mak, Junwen Luo, Wayne Luk, Alexandre Yakovlev

Proceedings of the 2011 International Conference on Embedded Computer Systems: Architectures, 2011

Objective-driven workload allocation in heterogeneous computing systems.

Qiang Liu, Wayne Luk

Proceedings of the 2011 International Conference on Field-Programmable Technology, 2011

2010

Convex models for accelerating applications on FPGA-based clusters.

Qiang Liu, Tim Todman, Kuen Hung Tsoi, Wayne Luk

Proceedings of the International Conference on Field-Programmable Technology, 2010

A Scripting Engine for Combining Design Transformations.

Tim Todman, Qiang Liu, Wayne Luk, George A. Constantinides

Proceedings of the 18th IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2010

Customizable Composition and Parameterization of Hardware Design Transformations.

Tim Todman, Qiang Liu, Wayne Luk, George A. Constantinides

Proceedings of the 13th Euromicro Conference on Digital System Design, 2010

Combining optimizations in automated low power design.

Qiang Liu, Tim Todman, Wayne Luk

Proceedings of the Design, Automation and Test in Europe, 2010

2009

Combining Data Reuse With Data-Level Parallelization for FPGA-Targeted Hardware Compilation: A Geometric Programming Framework.

Qiang Liu, George A. Constantinides, Konstantinos Masselos, Peter Y. K. Cheung

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2009

Data-reuse exploration under an on-chip memory constraint for low-power FPGA-based systems.

Qiang Liu, George A. Constantinides, Konstantinos Masselos, Peter Y. K. Cheung

IET Comput. Digit. Tech., 2009

A high-level compilation toolchain for heterogeneous systems.

Wayne Luk, José Gabriel de Figueiredo Coutinho, Timothy John Todman, Yuet Ming Lam, William George Osborne, Kong Woei Susanto, Qiang Liu, W. S. Wong

Proceedings of the Annual IEEE International SoC Conference, SoCC 2009, 2009

Optimising designs by combining model-based and pattern-based transformations.

Qiang Liu, Tim Todman, José Gabriel de Figueiredo Coutinho, Wayne Luk, George A. Constantinides

Proceedings of the 19th International Conference on Field Programmable Logic and Applications, 2009

2008

Data Reuse and Parallelism in Hardware Compilation.

Qiang Liu

PhD thesis, 2008

Combining data reuse exploitationwith data-level parallelization for FPGA targeted hardware compilation: A geometric programming framework.

Qiang Liu, George A. Constantinides, Konstantinos Masselos, Peter Y. K. Cheung

Proceedings of the FPL 2008, 2008

Compiling C-like Languages to FPGA Hardware: Some Novel Approaches Targeting Data Memory Organisation.

Qiang Liu, George A. Constantinides, Konstantinos Masselos, Peter Y. K. Cheung

Proceedings of the Visions of Computer Science, 2008

2007

Automatic On-chip Memory Minimization for Data Reuse.

Qiang Liu, George A. Constantinides, Konstantinos Masselos, Peter Y. K. Cheung

Proceedings of the IEEE Symposium on Field-Programmable Custom Computing Machines, 2007

2006

Data Reuse Exploration for FPGA Based Platforms Applied to the Full Search Motion Estimation Algorithm.

Konstantinos Masselos, George A. Constantinides, Qiang Liu

Proceedings of the 2006 International Conference on Field Programmable Logic and Applications (FPL), 2006