Qi-Feng Zeng

According to our database, Qi-Feng Zeng authored at least 5 papers between 2018 and 2022.

Collaborative distances:

• Dijkstra number of six.
• Erdős number of five.

2022

A 16-Bit Calibration-Free SAR ADC With Binary-Window and Capacitor-Swapping DAC Switching Schemes.

Yung-Hui Chung, Chia-Hui Tien, Qi-Feng Zeng

IEEE Trans. Circuits Syst. I Regul. Pap., 2022

2020

A 12-bit SAR ADC With a DAC-Configurable Window Switching Scheme.

Yung-Hui Chung, Qi-Feng Zeng, Yi-Shen Lin

IEEE Trans. Circuits Syst. I Regul. Pap., 2020

A 12-bit 100-kS/s SAR ADC for IoT Applications.

Yung-Hui Chung, Qi-Feng Zeng

Proceedings of the 2020 International Symposium on VLSI Design, Automation and Test, 2020

2019

A 102dB-SFDR 16-bit Calibration-Free SAR ADC in 180-nm CMOS.

Yung-Hui Chung, Chia-Hui Tien, Qi-Feng Zeng

Proceedings of the 2019 IEEE Asia Pacific Conference on Circuits and Systems, 2019

2018

A 12-bit 20-MS/s SAR ADC With Fast-Binary-Window DAC Switching in 180nm CMOS.

Yung-Hui Chung, Yi-Shen Lin, Qi-Feng Zeng

Proceedings of the 2018 IEEE Asia Pacific Conference on Circuits and Systems, 2018