Pyoungwon Park

According to our database, Pyoungwon Park authored at least 8 papers between 2011 and 2022.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2022

Experimental Validation of High Precision Web Handling for a Two-Actuator-Based Roll-to-Roll System.

Jaeyoung Kim, Kyungrok Kim, Hyunchang Kim, Pyoungwon Park, Seonghyun Lee, Taikmin Lee, Dongwoo Kang

Sensors, 2022

2016

Digital Compensation Method for the Path Delay Mismatches in GRO-TDC.

Pyoungwon Park, Dipankar Nag, Dan Lei Yan, Muthukumaraswamy Annamalai Arasu

J. Circuits Syst. Comput., 2016

2015

A Thermistor-Based Temperature Sensor for a Real-Time Clock With ± 2 ppm Frequency Stability.

Pyoungwon Park, David Ruffieux, Kofi A. A. Makinwa

IEEE J. Solid State Circuits, 2015

5.10 A 4.7MHz 53μW fully differential CMOS reference clock oscillator with -22dB worst-case PSNR for miniaturized SoCs.

Junghyup Lee, Pyoungwon Park, SeongHwan Cho, Minkyu Je

Proceedings of the 2015 IEEE International Solid-State Circuits Conference, 2015

2014

A resistor-based temperature sensor for a real time clock with ±2ppm frequency stability.

Pyoungwon Park, Kofi A. A. Makinwa, David Ruffieux

Proceedings of the ESSCIRC 2014, 2014

2012

A 2.4 GHz Fractional-N Frequency Synthesizer With High-OSR ΔΣ Modulator and Nested PLL.

Pyoungwon Park, Dongmin Park, SeongHwan Cho

IEEE J. Solid State Circuits, 2012

An all-digital clock generator using a fractionally injection-locked oscillator in 65nm CMOS.

Pyoungwon Park, Jaejin Park, Hojin Park, SeongHwan Cho

Proceedings of the 2012 IEEE International Solid-State Circuits Conference, 2012

2011

A fractional-N frequency synthesizer using high-OSR delta-sigma modulator and nested-PLL.

Pyoungwon Park, Dongmin Park, SeongHwan Cho

Proceedings of the 2011 IEEE Custom Integrated Circuits Conference, 2011