Puja Kumari

According to our database, Puja Kumari authored at least 2 papers between 2018 and 2024.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2024

MATLAB-Simulink based Framework for Combinational ATPG Applied to Testing of Digital Blocks in Analog and Mixed-Signal Circuits.

Puja Kumari, Rahul Bhattacharya

Proceedings of the 28th International Symposium on VLSI Design and Test, 2024

2018

Performance optimization in flip flop circuit design.

Himadri Nath Saha, Pooja Joshi, Adriza Chattopadhyay, Barsha Deb, Anurupa Ghosh, Puja Kumari, Dipak Kumar Mahato, Sayantani Choudhuri, Sayani Bhattacharjee, Sourav Chattopadhyay, Pranami Dash, Basab BijoyGharai

Proceedings of the IEEE 8th Annual Computing and Communication Workshop and Conference, 2018