Puja Ghosh

According to our database, Puja Ghosh authored at least 6 papers between 2017 and 2024.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2024

Electrical characteristics assessment and noise analysis of pocket-doped multi source T-shaped gate tunnel FET.

Sushmita Kumari, Puja Ghosh

Microelectron. J., February, 2024

2022

Study of variability induced by random dopant fluctuation in Fe DS-SBTFET.

Puja Ghosh, Brinda Bhowmick

Microelectron. J., 2022

Performance analysis and digital application of vertical L-pattern dual tunnel diode TFET.

Puja Ghosh

Microelectron. J., 2022

2019

Optimization of ferroelectric tunnel junction TFET in presence of temperature and its RF analysis.

Puja Ghosh, Rupam Goswami, Brinda Bhowmick

Microelectron. J., 2019

The Impact of Interface Traps (acceptor/donor) on Fe DS-SBTFET Characteristics.

Puja Ghosh, Brinda Bhowmick

Proceedings of the TENCON 2019, 2019

2017

Design and Implementation of Ternary Content Addressable Memory (TCAM) Based Hierarchical Motion Estimation for Video Processing.

Puja Ghosh, P. Rangababu

Proceedings of the VLSI Design and Test - 21st International Symposium, 2017