Priyajit Mukherjee
Orcid: 0000-0001-9561-3683
According to our database1,
Priyajit Mukherjee
authored at least 13 papers
between 2012 and 2020.
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Bibliography
2020
2019
Thermal-aware task allocation and scheduling for periodic real-time applications in mesh-based heterogeneous NoCs.
Real Time Syst., 2019
2018
IEEE Trans. Computers, 2018
J. Parallel Distributed Comput., 2018
Area Constrained Performance Optimized ASNoC Synthesis with Thermal‐aware White Space Allocation and Redistribution.
Integr., 2018
2017
Deadline and energy aware dynamic task mapping and scheduling for Network-on-Chip based multi-core platform.
J. Syst. Archit., 2017
Low Power Low Latency Floorplan‐aware Path Synthesis in Application-Specific Network-on-Chip Design.
Integr., 2017
2016
Proceedings of the 20th International Symposium on VLSI Design and Test, 2016
An ILP-based floorplan-aware path synthesis technique for Application-Specific NoC design.
Proceedings of the 2016 3rd International Conference on Recent Advances in Information Technology (RAIT), 2016
2013
Proceedings of the 2013 International Symposium on Electronic System Design, 2013
2012
Proceedings of the Progress in VLSI Design and Test - 16th International Symposium, 2012
Proceedings of the IEEE 25th International SOC Conference, 2012