Prithviraj Banerjee

According to our database, Prithviraj Banerjee authored at least 289 papers between 1983 and 2024.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of two.

2024

Introducing HOT3D: An Egocentric Dataset for 3D Hand and Object Tracking.

Prithviraj Banerjee, Sindi Shkodrani, Pierre Moulon, Shreyas Hampali, Fan Zhang, Jade Fountain, Edward Miller, Selen Basol, Richard A. Newcombe, Robert Wang, Jakob Julian Engel, Tomas Hodan

CoRR, 2024

2022

Hybrid Digital Twins: A Primer on Combining Physics-Based and Data Analytics Approaches.

Matt Adams, Xiao Li, Lucas Boucinha, Sameer S. Kher, Prith Banerjee, Jose-Luis Gonzalez

IEEE Softw., 2022

Identity Preserving Loss for Learned Image Compression.

Jiuhong Xiao, Lavisha Aggarwal, Prithviraj Banerjee, Manoj Aggarwal, Gerard Medioni

Proceedings of the IEEE/CVF Conference on Computer Vision and Pattern Recognition Workshops, 2022

2014

Pose Filter Based Hidden-CRF Models for Activity Detection.

Prithviraj Banerjee, Ramakant Nevatia

Proceedings of the Computer Vision - ECCV 2014, 2014

Multi-state Discriminative Video Segment Selection for Complex Event Classification.

Prithviraj Banerjee, Ram Nevatia

Proceedings of the Computer Vision - ACCV 2014, 2014

2012

On a Technique for Transparently Empowering Classical Compiler Optimizations on Multithreaded Code.

Pramod G. Joisha, Robert S. Schreiber, Prithviraj Banerjee, Hans-Juergen Boehm, Dhruva R. Chakrabarti

ACM Trans. Program. Lang. Syst., 2012

Towards a net-zero data center.

Prithviraj Banerjee, Chandrakant D. Patel, Cullen E. Bash, Amip Shah, Martin F. Arlitt

ACM J. Emerg. Technol. Comput. Syst., 2012

Pose based activity recognition using Multiple Kernel learning.

Prithviraj Banerjee, Ramakant Nevatia

Proceedings of the 21st International Conference on Pattern Recognition, 2012

2011

Everything as a Service: Powering the New Information Economy.

Prith Banerjee, Rich Friedrich, Cullen E. Bash, Patrick Goldsack, Bernardo A. Huberman, John Manley, Chandrakant D. Patel, Parthasarathy Ranganathan, Alistair C. Veitch

Computer, 2011

A technique for the effective and automatic reuse of classical compiler optimizations on multithreaded code.

Pramod G. Joisha, Robert S. Schreiber, Prithviraj Banerjee, Hans-Juergen Boehm, Dhruva R. Chakrabarti

Proceedings of the 38th ACM SIGPLAN-SIGACT Symposium on Principles of Programming Languages, 2011

The runtime abort graph and its application to software transactional memory optimization.

Dhruva R. Chakrabarti, Prithviraj Banerjee, Hans-Juergen Boehm, Pramod G. Joisha, Robert S. Schreiber

Proceedings of the CGO 2011, 2011

Learning neighborhood cooccurrence statistics of sparse features for human activity recognition.

Prithviraj Banerjee, Ram Nevatia

Proceedings of the 8th IEEE International Conference on Advanced Video and Signal-Based Surveillance, 2011

Resource optimization and deadlock prevention while generating streaming architectures from ordinary programs.

Lei Gao, Gaurav Mittal, David Zaretsky, Prith Banerjee

Proceedings of the 2011 NASA/ESA Conference on Adaptive Hardware and Systems, 2011

2010

Open Innovation at HP Labs.

Prith Banerjee, Rich Friedrich, Lueny Morell

Computer, 2010

Accurate person tracking through changing poses for multi-view action recognition.

Pradeep Natarajan, Prithviraj Banerjee, Ram Nevatia

Proceedings of the Seventh Indian Conference on Computer Vision, 2010

Automatic Generation of Stream Descriptors for Streaming Architectures.

Lei Gao, David Zaretsky, Gaurav Mittal, Dan Schonfeld, Prith Banerjee

Proceedings of the 39th International Conference on Parallel Processing, 2010

An Intelligent IT Infrastructure for the Future.

Prith Banerjee

Proceedings of the Distributed Computing and Networking, 11th International Conference, 2010

Dynamics Based Trajectory Segmentation for UAV videos.

Prithviraj Banerjee, Ram Nevatia

Proceedings of the Seventh IEEE International Conference on Advanced Video and Signal Based Surveillance, 2010

2009

A software pipelining algorithm in high-level synthesis for FPGA architectures.

Lei Gao, David Zaretsky, Gaurav Mittal, Dan Schonfeld, Prith Banerjee

Proceedings of the 10th International Symposium on Quality of Electronic Design (ISQED 2009), 2009

Streaming Implementation of the ZLIB Decoder Algorithm on an FPGA.

David Zaretsky, Gaurav Mittal, Prithviraj Banerjee

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2009), 2009

An Automated Algorithm to Generate Stream Programs.

Lei Gao, Gaurav Mittal, David Zaretsky, Dan Schonfeld, Prithviraj Banerjee

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2009), 2009

Streaming implementation of a sequential decompression algorithm on an FPGA.

Gaurav Mittal, David Zaretsky, Prithviraj Banerjee

Proceedings of the ACM/SIGDA 17th International Symposium on Field Programmable Gate Arrays, 2009

Sustainable data centers: enabled by supply and demand side management.

Prith Banerjee, Chandrakant D. Patel, Cullen E. Bash, Parthasarathy Ranganathan

Proceedings of the 46th Design Automation Conference, 2009

Complete-k-distinguishability for retiming and resynthesis equivalence checking without restricting synthesis.

Nikolaos D. Liveris, Hai Zhou, Prithviraj Banerjee

Proceedings of the 14th Asia South Pacific Design Automation Conference, 2009

2008

State space abstraction for parameterized self-stabilizing embedded systems.

Nikolaos D. Liveris, Hai Zhou, Robert P. Dick, Prithviraj Banerjee

Proceedings of the 8th ACM & IEEE International conference on Embedded software, 2008

A dynamic-programming algorithm for reducing the energy consumption of pipelined System-Level streaming applications.

Nikolaos D. Liveris, Hai Zhou, Prithviraj Banerjee

Proceedings of the 13th Asia South Pacific Design Automation Conference, 2008

2007

An Overview of a Compiler for Mapping Software Binaries to Hardware.

Gaurav Mittal, David Zaretsky, Xiaoyong Tang, Prithviraj Banerjee

IEEE Trans. Very Large Scale Integr. Syst., 2007

Low-Power Optimization by Smart Bit-Width Allocation in a SystemC-Based ASIC Design Environment.

Arindam Mallik, Debjit Sinha, Prithviraj Banerjee, Hai Zhou

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2007

A translator system for the MATLAB language.

Pramod G. Joisha, Prithviraj Banerjee

Softw. Pract. Exp., 2007

Balanced Scheduling and Operation Chaining in High-Level Synthesis for FPGA Designs.

David Zaretsky, Gaurav Mittal, Robert P. Dick, Prith Banerjee

Proceedings of the 8th International Symposium on Quality of Electronic Design (ISQED 2007), 2007

Retiming for Synchronous Data Flow Graphs.

Nikolaos D. Liveris, Chuan Lin, J. Wang, Hai Zhou, Prithviraj Banerjee

Proceedings of the 12th Conference on Asia South Pacific Design Automation, 2007

2006

An algebraic array shape inference system for MATLAB.

Pramod G. Joisha, Prithviraj Banerjee

ACM Trans. Program. Lang. Syst., 2006

Macro-models for high-level area and power estimation on FPGAs.

Tianyi Jiang, Xiaoyong Tang, Prith Banerjee

Int. J. Simul. Process. Model., 2006

Dynamic Template Generation for Resource Sharing in Control and Data Flow Graphs.

David Zaretsky, Gaurav Mittal, Robert P. Dick, Prith Banerjee

Proceedings of the 19th International Conference on VLSI Design (VLSI Design 2006), 2006

Smart bit-width allocation for low power optimization in a systemc based ASIC design environment.

Arindam Mallik, Debjit Sinha, Prithviraj Banerjee, Hai Zhou

Proceedings of the Conference on Design, Automation and Test in Europe, 2006

2005

An Algorithm for Trading Off Quantization Error with Hardware Resources for MATLAB-Based FPGA Design.

Sanghamitra Roy, Prith Banerjee

IEEE Trans. Computers, 2005

High-Level Synthesis for Low Power Hardware Implementation of Unscheduled Data-Dominated Circuits.

Xiaoyong Tang, Tianyi Jiang, Alex K. Jones, Prithviraj Banerjee

J. Low Power Electron., 2005

Behavioral Synthesis of Data-Dominated Circuits for Minimal Energy Implementation.

Xiaoyong Tang, Tianyi Jiang, Alex K. Jones, Prithviraj Banerjee

Proceedings of the 18th International Conference on VLSI Design (VLSI Design 2005), 2005

Generation of Control and Data Flow Graphs from Scheduled and Pipelined Assembly Code.

David Zaretsky, Gaurav Mittal, Robert P. Dick, Prith Banerjee

Proceedings of the Languages and Compilers for Parallel Computing, 2005

Leakage power optimization with dual-V_th library in high-level synthesis.

Xiaoyong Tang, Hai Zhou, Prithviraj Banerjee

Proceedings of the 42nd Design Automation Conference, 2005

An Efficient System-Level to RTL Verification Framework for Computation-Intensive Applications.

Nikolaos D. Liveris, Hai Zhou, Prithviraj Banerjee

Proceedings of the 14th Asian Test Symposium (ATS 2005), 2005

Automatic extraction of function bodies from software binaries.

Gaurav Mittal, David Zaretsky, Gokhan Memik, Prith Banerjee

Proceedings of the 2005 Conference on Asia South Pacific Design Automation, 2005

2004

Overview of a compiler for synthesizing MATLAB programs onto FPGAs.

Prithviraj Banerjee, Malay Haldar, Anshuman Nayak, Victor Kim, Vikram Saxena, Steven Parkes, Debabrata Bagchi, Satrajit Pal, Nikhil Tripathi, David Zaretsky, Robert Anderson, Juan Ramon Uribe

IEEE Trans. Very Large Scale Integr. Syst., 2004

Handling Data Streams while Compiling C Programs onto Hardware.

Rajarshi Mukherjee, Alex K. Jones, Prithviraj Banerjee

Proceedings of the 2004 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2004), 2004

Evaluation of scheduling and allocation algorithms while mapping assembly code onto FPGAs.

David Zaretsky, Gaurav Mittal, Xiaoyong Tang, Prithviraj Banerjee

Proceedings of the 14th ACM Great Lakes Symposium on VLSI 2004, 2004

An algorithm for trading off quantization error with hardware resources for MATLAB based FPGA design.

Sanghamitra Roy, Debjit Sinha, Prithviraj Banerjee

Proceedings of the ACM/SIGDA 12th International Symposium on Field Programmable Gate Arrays, 2004

High level area, delay and power estimation for FPGAs.

Tianyi Jiang, Xiaoyong Tang, Prithviraj Banerjee

Proceedings of the ACM/SIGDA 12th International Symposium on Field Programmable Gate Arrays, 2004

Overview of the FREEDOM Compiler for Mapping DSP Software to FPGAs.

David Zaretsky, Gaurav Mittal, Xiaoyong Tang, Prithviraj Banerjee

Proceedings of the 12th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM 2004), 2004

Power Aware Interface Synthesis for Bus-Based SoC Design.

Nikolaos D. Liveris, Prithviraj Banerjee

Proceedings of the 2004 Design, 2004

An algorithm for converting floating-point computations to fixed-point in MATLAB based FPGA design.

Sanghamitra Roy, Prithviraj Banerjee

Proceedings of the 41th Design Automation Conference, 2004

Automatic translation of software binaries onto FPGAs.

Gaurav Mittal, David Zaretsky, Xiaoyong Tang, Prithviraj Banerjee

Proceedings of the 41th Design Automation Conference, 2004

2003

Reducing False Sharing and Improving Spatial Locality in a Unified Compilation Framework.

Mahmut T. Kandemir, Alok N. Choudhary, J. Ramanujam, Prithviraj Banerjee

IEEE Trans. Parallel Distributed Syst., 2003

An Algorithm-Based Error Detection Scheme for the Multigrid Method.

Amitabh Mishra, Prithviraj Banerjee

IEEE Trans. Computers, 2003

Static array storage optimization in MATLAB.

Pramod G. Joisha, Prithviraj Banerjee

Proceedings of the ACM SIGPLAN 2003 Conference on Programming Language Design and Implementation 2003, 2003

Making area-performance tradeoffs at the high level using the AccelFPGA compiler for FPGAs.

Prithviraj Banerjee, Vikram Saxena, Juan Ramon Uribe, Malay Haldar, Anshuman Nayak, Victor Kim, Debabrata Bagchi, Satrajit Pal, Nikhil Tripathi, Robert Anderson

Proceedings of the ACM/SIGDA International Symposium on Field Programmable Gate Arrays, 2003

An Automated and Power-Aware Framework for Utilization of IP Cores in Hardware Generated from C Descriptions Targeting FPGAs.

Alex K. Jones, Prithviraj Banerjee

Proceedings of the 11th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM 2003), 2003

Automatic Conversion of Floating Point MATLAB Programs into Fixed Point FPGA Based Hardware Design.

Prithviraj Banerjee, Debabrata Bagchi, Malay Haldar, Anshuman Nayak, Victor Kim, R. Uribe

Proceedings of the 11th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM 2003), 2003

The MAGICA Type Inference Engine for MATLAB.

Pramod G. Joisha, Prithviraj Banerjee

Proceedings of the Compiler Construction, 12th International Conference, 2003

Adaptive computing: what can it do, where can it go?

Robert Reuss, Jose L. Muñoz, Toshiaki Miyazaki, Nader Bagherzadeh, Prith Banerjee, Brad L. Hutchings, Brian Schott

Proceedings of the 2003 Asia and South Pacific Design Automation Conference, 2003

An overview of a compiler for mapping MATLAB programs onto FPGAs.

Prith Banerjee

Proceedings of the 2003 Asia and South Pacific Design Automation Conference, 2003

2002

Automatic Parallelization of Compiled Event Driven VHDL Simulation.

Venkatram Krishnaswamy, Gagan Hasteer, Prithviraj Banerjee

IEEE Trans. Computers, 2002

A Behavioral Synthesis Tool for Exploiting Fine Grain Parallelism in FPGAs.

Prithviraj Banerjee, Malay Haldar, Anshuman Nayak, Victor Kim, Debabrata Bagchi, Satrajit Pal, Nikhil Tripathi

Proceedings of the Distributed Computing, 2002

Accurate Area and Delay Estimators for FPGAs.

Anshuman Nayak, Malay Haldar, Alok N. Choudhary, Prithviraj Banerjee

Proceedings of the 2002 Design, 2002

PACT HDL: a C compiler targeting ASICs and FPGAs with power and performance optimizations.

Alex K. Jones, Debabrata Bagchi, Satrajit Pal, Xiaoyong Tang, Alok N. Choudhary, Prithviraj Banerjee

Proceedings of the International Conference on Compilers, 2002

2001

Power Optimization of Delay Constrained Circuits.

Anshuman Nayak, Malay Haldar, Prith Banerjee, Chunhong Chen, Majid Sarrafzadeh

VLSI Design, 2001

Static and Dynamic Locality Optimizations Using Integer Linear Programming.

Mahmut T. Kandemir, Prithviraj Banerjee, Alok N. Choudhary, J. Ramanujam, Eduard Ayguadé

IEEE Trans. Parallel Distributed Syst., 2001

The Efficient Computation of Ownership Sets in HPF.

Pramod G. Joisha, Prithviraj Banerjee

IEEE Trans. Parallel Distributed Syst., 2001

An algorithm for synthesis of large time-constrained heterogeneous adaptive systems.

U. Nagaraj Shenoy, Alok N. Choudhary, Prithviraj Banerjee

ACM Trans. Design Autom. Electr. Syst., 2001

A Layout-Conscious Iteration Space Transformation Technique.

Mahmut T. Kandemir, J. Ramanujam, Alok N. Choudhary, Prithviraj Banerjee

IEEE Trans. Computers, 2001

Handling context-sensitive syntactic issues in the design of a front-end for a MATLAB compiler.

Pramod G. Joisha, Abhay Kanhere, Prithviraj Banerjee, U. Nagaraj Shenoy, Alok N. Choudhary

ACM SIGAPL APL Quote Quad, 2001

A Parallel Implementation of a Fast Multipole-Based 3-D Capacitance Extraction Program on Distributed Memory Multicomputers.

Yanhong Yuan, Prithviraj Banerjee

J. Parallel Distributed Comput., 2001

Static Single Assignment Form for Message-Passing Programs.

Dhruva R. Chakrabarti, Prithviraj Banerjee

Int. J. Parallel Program., 2001

Efficient Synthesis of Array Intensive Computations onto FPGA Based Accelerators.

U. Nagaraj Shenoy, Prithviraj Banerjee, Alok N. Choudhary, Mahmut T. Kandemir

Proceedings of the 14th International Conference on VLSI Design (VLSI Design 2001), 2001

Fpga Hardware Synthesis From Matlab.

Malay Haldar, Anshuman Nayak, Alok N. Choudhary, Prithviraj Banerjee, U. Nagaraj Shenoy

Proceedings of the 14th International Conference on VLSI Design (VLSI Design 2001), 2001

Computing Array Shapes in MATLAB.

Pramod G. Joisha, U. Nagaraj Shenoy, Prithviraj Banerjee

Proceedings of the Languages and Compilers for Parallel Computing, 2001

Global optimization techniques for automatic parallelization of hybrid applications.

Dhruva R. Chakrabarti, Prithviraj Banerjee

Proceedings of the 15th international conference on Supercomputing, 2001

A System for Synthesizing Optimized FPGA Hardware from MATLAB.

Malay Haldar, Anshuman Nayak, Alok N. Choudhary, Prithviraj Banerjee

Proceedings of the 2001 IEEE/ACM International Conference on Computer-Aided Design, 2001

Parallelization of MATLAB Applications for a Multi-FPGA System.

Anshuman Nayak, Malay Haldar, Alok N. Choudhary, Prith Banerjee

Proceedings of the 9th Annual IEEE Symposium on Field-Programmable Custom Computing Machines, 2001

Precision and error analysis of MATLAB applications during automated hardware synthesis for FPGAs.

Anshuman Nayak, Malay Haldar, Alok N. Choudhary, Prithviraj Banerjee

Proceedings of the Conference on Design, Automation and Test in Europe, 2001

Compiler Optimization of Dynamic Data Distributions for Distributed-Memory Multicomputers.

Daniel J. Palermo, Eugene W. Hodges IV, Prithviraj Banerjee

Proceedings of the Compiler Optimizations for Scalable Parallel Systems Languages, 2001

Automated synthesis of pipelined designs on FPGAs for signal and image processing applications described in MATLAB.

Malay Haldar, Anshuman Nayak, Alok N. Choudhary, Prithviraj Banerjee

Proceedings of ASP-DAC 2001, 2001

Correctly detecting intrinsic type errors in typeless languages such as MATLAB.

Pramod G. Joisha, Prithviraj Banerjee

Proceedings of the 2001 International Conference on APL: An Arrays Odyssey, 2001

2000

Compiler and Run-Time Support for Exploiting Regularity within Irregular Applications.

Antonio Lain, Dhruva R. Chakrabarti, Prithviraj Banerjee

IEEE Trans. Parallel Distributed Syst., 2000

Minimizing Data and Synchronization Costs in One-Way Communication.

Mahmut T. Kandemir, Alok N. Choudhary, Prithviraj Banerjee, J. Ramanujam, U. Nagaraj Shenoy

IEEE Trans. Parallel Distributed Syst., 2000

Exploiting Ownership Sets in HPF.

Pramod G. Joisha, Prithviraj Banerjee

Proceedings of the Languages and Compilers for Parallel Computing, 2000

CHIMAERA: a high-performance architecture with a tightly-coupled reconfigurable functional unit.

Zhi Alex Ye, Andreas Moshovos, Scott Hauck, Prithviraj Banerjee

Proceedings of the 27th International Symposium on Computer Architecture (ISCA 2000), 2000

A Parallel Implementation of a Fast Multipole Based 3-D Capacitance Extraction Program on Distributed Memory Multicomputer.

Yanhong Yuan, Prithviraj Banerjee

Proceedings of the 14th International Parallel & Distributed Processing Symposium (IPDPS'00), 2000

Fine-Grained Parallel VLSI Synthesis for Commercial CAD on a Network of Workstations.

Victor Kim, Prithviraj Banerjee, Kaushik De

Proceedings of the 2000 International Conference on Parallel Processing, 2000

Match Virtual Machine: An Adaptive Runtime System to Execute MATLAB in Parallel.

Malay Haldar, Anshuman Nayak, Abhay Kanhere, Pramod G. Joisha, U. Nagaraj Shenoy, Alok N. Choudhary, Prithviraj Banerjee

Proceedings of the 2000 International Conference on Parallel Processing, 2000

Comparative Study of Parallel Algorithms for 3-D Capacitance Extraction on Distributed Memory Multiprocessors.

Yanhong Yuan, Prithviraj Banerjee

Proceedings of the IEEE International Conference On Computer Design: VLSI In Computers & Processors, 2000

Parallel algorithms for FPGA placement.

Malay Haldar, Anshuman Nayak, Alok N. Choudhary, Prithviraj Banerjee

Proceedings of the 10th ACM Great Lakes Symposium on VLSI 2000, 2000

A C compiler for a processor with a reconfigurable functional unit.

Zhi Alex Ye, U. Nagaraj Shenoy, Prithviraj Banerjee

Proceedings of the ACM/SIGDA International Symposium on Field Programmable Gate Arrays, 2000

A MATLAB Compiler for Distributed, Heterogeneous, Reconfigurable Computing Systems.

Prithviraj Banerjee, U. Nagaraj Shenoy, Alok N. Choudhary, Scott Hauck, C. Bachmann, Malay Haldar, Pramod G. Joisha, Alex K. Jones, Abhay Kanhere, Anshuman Nayak, S. Periyacheri, M. Walkden, David Zaretsky

Proceedings of the 8th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM 2000), 2000

A System-Level Synthesis Algorithm with Guaranteed Solution Quality.

U. Nagaraj Shenoy, Prithviraj Banerjee, Alok N. Choudhary

Proceedings of the 2000 Design, 2000

Scheduling algorithms for automated synthesis of pipelined designs on FPGAs for applications described in MATLAB.

Malay Haldar, Anshuman Nayak, Alok N. Choudhary, Prithviraj Banerjee

Proceedings of the 2000 International Conference on Compilers, 2000

1999

Placement with Incomplete Data.

Maogang Wang, Prithviraj Banerjee, Majid Sarrafzadeh

VLSI Design, 1999

A Linear Algebra Framework for Automatic Determination of Optimal Data Layouts.

Mahmut T. Kandemir, Alok N. Choudhary, U. Nagaraj Shenoy, Prithviraj Banerjee, J. Ramanujam

IEEE Trans. Parallel Distributed Syst., 1999

A global communication optimization technique based on data-flow analysis and linear algebra.

Mahmut T. Kandemir, Prithviraj Banerjee, Alok N. Choudhary, J. Ramanujam, U. Nagaraj Shenoy

ACM Trans. Program. Lang. Syst., 1999

Parallel Algorithms for Force Directed Scheduling of Flattened and Hierarchical Signal Flow Graphs.

Pradeep Prabhakaran, Prithviraj Banerjee

IEEE Trans. Computers, 1999

A Matrix-Based Approach to Global Locality Optimization.

Mahmut T. Kandemir, Alok N. Choudhary, J. Ramanujam, Prithviraj Banerjee

J. Parallel Distributed Comput., 1999

A Parallel Circuit-Partitioned Algorithm for Timing-Driven Standard Cell Placement.

John A. Chandy, Prithviraj Banerjee

J. Parallel Distributed Comput., 1999

Simultaneous Scheduling, Binding and Floorplanning for Interconnect Power Optimization.

Pradeep Prabhakaran, Prithviraj Banerjee, Jim E. Crenshaw, Majid Sarrafzadeh

Proceedings of the 12th International Conference on VLSI Design (VLSI Design 1999), 1999

Improving Locality Using a Graph-Based Technique for Detecting Memory Layouts of Arrays.

Mahmut T. Kandemir, Alok N. Choudhary, J. Ramanujam, Prithviraj Banerjee

Proceedings of the Ninth SIAM Conference on Parallel Processing for Scientific Computing, 1999

Accurate Data and Context Management in Message-Passing Programs.

Dhruva R. Chakrabarti, Prithviraj Banerjee

Proceedings of the Languages and Compilers for Parallel Computing, 1999

Incremental capacitance extraction and its application to iterative timing-driven detailed routing.

Yanhong Yuan, Prithviraj Banerjee

Proceedings of the 1999 International Symposium on Physical Design, 1999

Parallel construction algorithms for BDDs.

Jer-Sheng Chen, Prithviraj Banerjee

Proceedings of the 1999 International Symposium on Circuits and Systems, ISCAS 1999, Orlando, Florida, USA, May 30, 1999

A Graph Based Framework to Detect Optimal Memory Layouts for Improving Data Locality.

Mahmut T. Kandemir, Alok N. Choudhary, J. Ramanujam, Prithviraj Banerjee

Proceedings of the 13th International Parallel Processing Symposium / 10th Symposium on Parallel and Distributed Processing (IPPS / SPDP '99), 1999

PARADIGM (version 2.0): A New HPF Compilation System.

Pramod G. Joisha, Prithviraj Banerjee

Proceedings of the 13th International Parallel Processing Symposium / 10th Symposium on Parallel and Distributed Processing (IPPS / SPDP '99), 1999

A Novel Compilation Framework for Supporting Semi-Regular Distributions in Hybrid Applications.

Dhruva R. Chakrabarti, Prithviraj Banerjee

Proceedings of the 13th International Parallel Processing Symposium / 10th Symposium on Parallel and Distributed Processing (IPPS / SPDP '99), 1999

An integer linear programming approach for optimizing cache locality.

Mahmut T. Kandemir, Prithviraj Banerjee, Alok N. Choudhary, J. Ramanujam, Eduard Ayguadé

Proceedings of the 13th international conference on Supercomputing, 1999

A Framework for Interprocedural Locality Optimization Using Both Loop and Data Layout Transformations.

Mahmut T. Kandemir, Alok N. Choudhary, J. Ramanujam, Prithviraj Banerjee

Proceedings of the International Conference on Parallel Processing 1999, 1999

A Parallel 3-D Capacitance Extraction Program.

Yanhong Yuan, Prithviraj Banerjee

Proceedings of the High Performance Computing, 1999

ICE: Incremental 3-Dimensional Capacitance and Resistance Extraction for an Iterative Design Environment.

Yanhong Yuan, Prithviraj Banerjee

Proceedings of the 9th Great Lakes Symposium on VLSI (GLS-VLSI '99), 1999

An Incremental Floorplanner.

Jim E. Crenshaw, Majid Sarrafzadeh, Prithviraj Banerjee, Pradeep Prabhakaran

Proceedings of the 9th Great Lakes Symposium on VLSI (GLS-VLSI '99), 1999

An Algorithm Based Error Detection Scheme for the Multigrid Algorithm.

Amitabh Mishra, Prithviraj Banerjee

Proceedings of the Digest of Papers: FTCS-29, 1999

An Approxmimate Algorithm for Delay-Constraint Technology Mapping.

Sumit Roy, Krishna P. Belkhale, Prithviraj Banerjee

Proceedings of the 36th Conference on Design Automation, 1999

On Reducing False Sharing while Improving Locality on Shared Memory Multiprocessors.

Mahmut T. Kandemir, Alok N. Choudhary, J. Ramanujam, Prithviraj Banerjee

Proceedings of the 1999 International Conference on Parallel Architectures and Compilation Techniques, 1999

1998

Efficient equivalence checking of multi-phase designs using phase abstraction and retiming.

Gagan Hasteer, Anmol Mathur, Prithviraj Banerjee

ACM Trans. Design Autom. Electr. Syst., 1998

A Parallel Algorithm for State Assignment of Finite State Machines.

Gagan Hasteer, Prithviraj Banerjee

IEEE Trans. Computers, 1998

Partitioning sequential circuits for low power.

Sumit Roy, Prithviraj Banerjee, Majid Sarrafzadeh

Proceedings of the 11th International Conference on VLSI Design (VLSI Design 1991), 1998

Simultaneous Scheduling, Binding and Floorplanning in High-level Synthesis.

Pradeep Prabhakaran, Prithviraj Banerjee

Proceedings of the 11th International Conference on VLSI Design (VLSI Design 1991), 1998

Improving Locality Using Loop and Data Transformations in an Integrated Framework.

Mahmut T. Kandemir, Alok N. Choudhary, J. Ramanujam, Prithviraj Banerjee

Proceedings of the 31st Annual IEEE/ACM International Symposium on Microarchitecture, 1998

A Loop Transformation Algorithm Based on Explicit Data Layout Representation for Optimizing Locality.

Mahmut T. Kandemir, J. Ramanujam, Alok N. Choudhary, Prithviraj Banerjee

Proceedings of the Languages and Compilers for Parallel Computing, 1998

A parallel algorithm for zero skew clock tree routing.

Zhaoyun Xing, Prithviraj Banerjee

Proceedings of the 1998 International Symposium on Physical Design, 1998

A Generalized Framework for Global Communication Optimization.

Mahmut T. Kandemir, Prithviraj Banerjee, Alok N. Choudhary, J. Ramanujam, U. Nagaraj Shenoy

Proceedings of the 12th International Parallel Processing Symposium / 9th Symposium on Parallel and Distributed Processing (IPPS/SPDP '98), March 30, 1998

Evaluation of Compiler and Runtime Library Approaches for Supporting Parallel Regular Applications.

Dhruva R. Chakrabarti, Prithviraj Banerjee, Antonio Lain

Proceedings of the 12th International Parallel Processing Symposium / 9th Symposium on Parallel and Distributed Processing (IPPS/SPDP '98), March 30, 1998

Parallel Compiled Event Driven VHDL Simulation.

Venkatram Krishnaswamy, Prithviraj Banerjee

Proceedings of the 12th international conference on Supercomputing, 1998

A Hyperplane Based Approach for Optimizing Spatial Locality in Loop Nests.

Mahmut T. Kandemir, Alok N. Choudhary, U. Nagaraj Shenoy, Prithviraj Banerjee, J. Ramanujam

Proceedings of the 12th international conference on Supercomputing, 1998

An Efficient Uniform Run-time Scheme for Mixed Regular-irregular Applications.

Dhruva R. Chakrabarti, U. Nagaraj Shenoy, Alok N. Choudhary, Prithviraj Banerjee

Proceedings of the 12th international conference on Supercomputing, 1998

A Parallel Algorithm for Timing-driven Global Routing for Standard Cells.

Zhaoyun Xing, Prithviraj Banerjee

Proceedings of the 1998 International Conference on Parallel Processing (ICPP '98), 1998

A low-power logic optimization methodology based on a fast power-driven mapping.

Sumit Roy, Harm Arts, Prithviraj Banerjee

Proceedings of the International Conference on Computer Design: VLSI in Computers and Processors, 1998

PowerDrive: a fast, canonical POWER estimator for DRIVing synthEsis.

Sumit Roy, Harm Arts, Prithviraj Banerjee

Proceedings of the 1998 IEEE/ACM International Conference on Computer-Aided Design, 1998

Efficient equivalence checking of multi-phase designs using retiming.

Gagan Hasteer, Anmol Mathur, Prithviraj Banerjee

Proceedings of the 1998 IEEE/ACM International Conference on Computer-Aided Design, 1998

WADE: a Web-based automated parallel CAD environment.

Dhruva R. Chakrabarti, Pramod G. Joisha, John A. Chandy, Krishnaswamy Krishnaswamy, Venkatram Krishnaswamy, Prithviraj Banerjee

Proceedings of the 5th International Conference On High Performance Computing, 1998

Enhancing Spatial Locality via Data Layout Optimizations.

Mahmut T. Kandemir, Alok N. Choudhary, J. Ramanujam, U. Nagaraj Shenoy, Prithviraj Banerjee

Proceedings of the Euro-Par '98 Parallel Processing, 1998

PowerShake: A Low Power Driven Clustering and Factoring Methodology for Boolean Expressions.

Sumit Roy, Harm Arts, Prithviraj Banerjee

Proceedings of the 1998 Design, 1998

Potential-NRG: Placement with Incomplete Data.

Maogang Wang, Prithviraj Banerjee, Majid Sarrafzadeh

Proceedings of the 35th Conference on Design Automation, 1998

Parallel Algorithms for Power Estimation.

Victor Kim, Prithviraj Banerjee

Proceedings of the 35th Conference on Design Automation, 1998

An Implicit Algorithm for Finding Steady States and its Application to FSM Verification.

Gagan Hasteer, Anmol Mathur, Prithviraj Banerjee

Proceedings of the 35th Conference on Design Automation, 1998

A Matrix-Based Approach to the Global Locality Optimization Problem.

Mahmut T. Kandemir, Alok N. Choudhary, J. Ramanujam, Prithviraj Banerjee

Proceedings of the 1998 International Conference on Parallel Architectures and Compilation Techniques, 1998

1997

A Framework for Exploiting Task and Data Parallelism on Distributed Memory Multicomputers.

Shankar Ramaswamy, Sachin S. Sapatnekar, Prithviraj Banerjee

IEEE Trans. Parallel Distributed Syst., 1997

ProperTEST: a portable parallel test generator for sequential circuits.

Balkrishna Ramkumar, Prithviraj Banerjee

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1997

An evaluation of parallel simulated annealing strategies with application to standard cell placement.

John A. Chandy, Sungho Kim, Balkrishna Ramkumar, Steven Parkes, Prithviraj Banerjee

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1997

Implications of VHDL timing models on simulation and software synthesis.

Venkatram Krishnaswamy, Rajesh Gupta, Prithviraj Banerjee

J. Syst. Archit., 1997

Simulated Annealing Based Parallel State Assignment of Finite State Machines.

Gagan Hasteer, Prithviraj Banerjee

J. Parallel Distributed Comput., 1997

SPITFIRE: scalable parallel algorithms for test set partitioned fault simulation.

Dilip Krishnaswamy, Elizabeth M. Rudnick, Janak H. Patel, Prithviraj Banerjee

Proceedings of the 15th IEEE VLSI Test Symposium (VTS'97), 1997

Parallel Genetic Algorithms for Simulation-Based Sequential Circuit Test Generation.

Dilip Krishnaswamy, Michael S. Hsiao, Vikram Saxena, Elizabeth M. Rudnick, Janak H. Patel, Prithviraj Banerjee

Proceedings of the 10th International Conference on VLSI Design (VLSI Design 1997), 1997

Asynchronous Parallel Algorithms for Test Set Partitioned Fault Simulation.

Dilip Krishnaswamy, Prithviraj Banerjee, Elizabeth M. Rudnick, Janak H. Patel

Proceedings of the Eleventh Workshop on Parallel and Distributed Simulation, 1997

Parallel Global Routing Algorithms for Standard Cells.

Zhaoyun Xing, John A. Chandy, Prithviraj Banerjee

Proceedings of the 11th International Parallel Processing Symposium (IPPS '97), 1997

A Comparison of Parallel Approaches for Algebraic Factorization in Logic Synthesis.

Sumit Roy, Prithviraj Banerjee

Proceedings of the 11th International Parallel Processing Symposium (IPPS '97), 1997

Performance Evaluation of Message-Driven Parallel VLSI CAD Applications on General Purpose Multiprocessors.

John G. Holm, John A. Chandy, Steven Parkes, Sumit Roy, Venkatram Krishnaswamy, Gagan Hasteer, Prithviraj Banerjee

Proceedings of the 11th international conference on Supercomputing, 1997

Load Balancing and Workload Minimization Of Overlapping Parallel Tasks.

Venkatram Krishnaswamy, Gagan Hasteer, Prithviraj Banerjee

Proceedings of the 1997 International Conference on Parallel Processing (ICPP '97), 1997

Exploiting task and data parallelism in parallel Hough and Radon transforms.

Dilip Krishnaswamy, Prithviraj Banerjee

Proceedings of the 1997 International Conference on Parallel Processing (ICPP '97), 1997

A Parallel Circuit-Partitioned Algorithm for Timing Driven Cell Placement.

John A. Chandy, Prithviraj Banerjee

Proceedings of the Proceedings 1997 International Conference on Computer Design: VLSI in Computers & Processors, 1997

Performance Evaluation of a C++ Library Based Multithreaded System.

John G. Holm, Steven Parkes, Prithviraj Banerjee

Proceedings of the 30th Annual Hawaii International Conference on System Sciences (HICSS-30), 1997

An Efficient Assertion Checker for Combinational Properties.

Gagan Hasteer, Anmol Mathur, Prithviraj Banerjee

Proceedings of the 34st Conference on Design Automation, 1997

A procedure for software synthesis from VHDL models.

Venkatram Krishnaswamy, Rajesh Gupta, Prithviraj Banerjee

Proceedings of the ASP-DAC '97 Asia and South Pacific Design Automation Conference, 1997

1996

Algorithm-Based Error Detection Schemes for Iterative Solution of Partial Differential Equations.

Amber Roy-Chowdhury, Nikolaos Bellas, Prithviraj Banerjee

IEEE Trans. Computers, 1996

Algorithm-Based Fault Location and Recovery for Matrix Computations on Multiprocessor Systems.

Amber Roy-Chowdhury, Prithviraj Banerjee

IEEE Trans. Computers, 1996

Efficient Techniques for the Analysis of Algorithm-Based Fault Tolerance (ABFT) Schemes.

V. S. S. Nair, Jacob A. Abraham, Prithviraj Banerjee

IEEE Trans. Computers, 1996

A New Error Analysis Based Method for Tolerance Computation for Algorithm-Based Checks.

Amber Roy-Chowdhury, Prithviraj Banerjee

IEEE Trans. Computers, 1996

Optimizations for Efficient Array Redistribution on Distributed Memory Multicomputers.

Shankar Ramaswamy, Barbara Simons, Prithviraj Banerjee

J. Parallel Distributed Comput., 1996

Dynamic Data Partitioning for Distributed-Memory Multicomputers.

Daniel J. Palermo, Eugene W. Hodges IV, Prithviraj Banerjee

J. Parallel Distributed Comput., 1996

Parallel Algorithms for VLSI Layout Verification.

Ky MacPherson, Prithviraj Banerjee

J. Parallel Distributed Comput., 1996

Parallel simulated annealing strategies for VLSI cell placement.

John A. Chandy, Prithviraj Banerjee

Proceedings of the 9th International Conference on VLSI Design (VLSI Design 1996), 1996

Integrating task and data parallelism in an irregular application: a case study.

Ky McPherson, Prithviraj Banerjee

Proceedings of the Eighth IEEE Symposium on Parallel and Distributed Processing, 1996

Actor Based Parallel VHDL Simulation Using Time Warp.

Venkatram Krishnaswamy, Prithviraj Banerjee

Proceedings of the Tenth Workshop on Parallel and Distributed Simulation, 1996

Interprocedural Array Redistribution Data-Flow Analysis.

Daniel J. Palermo, Eugene W. Hodges IV, Prithviraj Banerjee

Proceedings of the Languages and Compilers for Parallel Computing, 1996

Distributed Object Oriented Data Structures and Algorithms for VLSI CAD.

John A. Chandy, Steven Parkes, Prithviraj Banerjee

Proceedings of the Parallel Algorithms for Irregularly Structured Problems, 1996

Compiling MATLAB Programs to ScaLAPACK: Exploiting Task and Data Parallelism.

Shankar Ramaswamy, Eugene W. Hodges IV, Prithviraj Banerjee

Proceedings of IPPS '96, 1996

Compiler Support for Hybrid Irregular Accesses on Multicomputers.

Antonio Lain, Prithviraj Banerjee

Proceedings of the 10th international conference on Supercomputing, 1996

Compiler Support for Privatization on Distributed-Memory Machines.

Daniel J. Palermo, Ernesto Su, Eugene W. Hodges IV, Prithviraj Banerjee

Proceedings of the 1996 International Conference on Parallel Processing, 1996

Compiler-Assisted Generation of Error-Detecting Parallel Programs.

Amber Roy-Chowdhury, Prithviraj Banerjee

Proceedings of the Digest of Papers: FTCS-26, 1996

A Parallel Algorithm for the Technology Mapping of LUT-Based FPGAs.

Vamsi Boppana, Prashant Saxena, Prithviraj Banerjee, W. Kent Fuchs, C. L. Liu

Proceedings of the Euro-Par '96 Parallel Processing, 1996

1995

Sequential circuit testability enhancement using a nonscan approach.

Elizabeth M. Rudnick, Vivek Chickermane, Prithviraj Banerjee, Janak H. Patel

IEEE Trans. Very Large Scale Integr. Syst., 1995

Simultaneous Allocation and Scheduling Using Convex Programming Techniques.

Shankar Ramaswamy, Prithviraj Banerjee

Parallel Process. Lett., 1995

The Paradigm Compiler for Distributed-Memory Multicomputers.

Prithviraj Banerjee, John A. Chandy, Manish Gupta, Eugene W. Hodges IV, John G. Holm, Antonio Lain, Daniel J. Palermo, Shankar Ramaswamy, Ernesto Su

Computer, 1995

Automatic Selection of Dynamic Data Partitioning Schemes for Distributed-Memory Multicomputers.

Daniel J. Palermo, Prithviraj Banerjee

Proceedings of the Languages and Compilers for Parallel Computing, 1995

Exploiting spatial regularity in irregular iterative applications.

Antonio Lain, Prithviraj Banerjee

Proceedings of IPPS '95, 1995

Parallel algorithms for logic synthesis using the MIS approach.

Kaushik De, John A. Chandy, Sumit Roy, Steven Parkes, Prithviraj Banerjee

Proceedings of IPPS '95, 1995

Advanced Compilation Techniques in the PARADIGM Compiler for Distributed-memory Multicomputers.

Ernesto Su, Antonio Lain, Shankar Ramaswamy, Daniel J. Palermo, Eugene W. Hodges IV, Prithviraj Banerjee

Proceedings of the 9th international conference on Supercomputing, 1995

A parallel algorithm for fault simulation based on PROOFS .

Steven Parkes, Prithviraj Banerjee, Janak H. Patel

Proceedings of the 1995 International Conference on Computer Design (ICCD '95), 1995

Software Schemes of Reconfiguration and Recovery in Distributed Memory Multicomputers Using the Actor Model.

Michael Peercy, Prithviraj Banerjee

Proceedings of the Digest of Papers: FTCS-25, 1995

1994

RSYN: a system for automated synthesis of reliable multilevel circuits.

Kaushik De, Chitra Natarajan, Devi Nair, Prithviraj Banerjee

IEEE Trans. Very Large Scale Integr. Syst., 1994

ProperCAD: A portable object-oriented parallel environment for VLSI CAD.

Balkrishna Ramkumar, Prithviraj Banerjee

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1994

A portable parallel algorithm for logic synthesis using transduction.

Kaushik De, Balkrishna Ramkumar, Prithviraj Banerjee

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1994

Design and Evaluation of Hardware Strategies for Reconfiguring Hypercubes and Meshes Under Faults.

Prithviraj Banerjee, Michael Peercy

IEEE Trans. Computers, 1994

A library-based approach to portable, parallel, object-oriented programming: interface, implementation, and application.

Steven Parkes, John A. Chandy, Prithviraj Banerjee

Proceedings of the Proceedings Supercomputing '94, 1994

ProperPLACE: A Portable Parallel Algorithm for Standard Cell Placement.

Sungho Kim, Prithviraj Banerjee, Balkrishna Ramkumar, Steven Parkes, John A. Chandy

Proceedings of the 8th International Symposium on Parallel Processing, 1994

Processor Tagged Descriptors: A Data Structure for Compiling for Distributed-Memory Multicomputers.

Ernesto Su, Daniel J. Palermo, Prithviraj Banerjee

Proceedings of the Parallel Architectures and Compilation Techniques, 1994

Techniques to overlap computation and communication in irregular iterative applications.

Antonio Lain, Prithviraj Banerjee

Proceedings of the 8th international conference on Supercomputing, 1994

A Convex Programming Approach for Exploiting Data and Functional Parallelism on Distributed Memory Multicomputers.

Shankar Ramaswamy, Sachin S. Sapatnekar, Prithviraj Banerjee

Proceedings of the 1994 International Conference on Parallel Processing, 1994

Communication Optimizations Used in the PARADIGM Compiler for Distributed Memory Multicomputers.

Daniel J. Palermo, Ernesto Su, John A. Chandy, Prithviraj Banerjee

Proceedings of the 1994 International Conference on Parallel Processing, 1994

Parallel Logic Synthesis Using Partitioning.

Kaushik De, Prithviraj Banerjee

Proceedings of the 1994 International Conference on Parallel Processing, 1994

Algorithm-Based Fault Location and Recovery for Matrix Computations.

Amber Roy-Chowdhury, Prithviraj Banerjee

Proceedings of the Digest of Papers: FTCS/24, 1994

ProperHITEC: A Portable, Parallel, Object-Oriented Approach to Sequential Test Generation.

Steven Parkes, Prithviraj Banerjee, Janak H. Patel

Proceedings of the 31st Conference on Design Automation, 1994

Parallel algorithms for VLSI computer-aided design.

Prithviraj Banerjee

Prentice Hall, ISBN: 978-0-13-015835-2, 1994

1993

PREST: a system for logic partitioning and resynthesis for testability.

Kaushik De, Prithviraj Banerjee

IEEE Trans. Very Large Scale Integr. Syst., 1993

Task scheduling for exploiting parallelism and hierarchy in VLSI CAD algorithms.

Krishna P. Belkhale, Randall J. Brouwer, Prithviraj Banerjee

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1993

Fault tolerant VLSI systems.

Michael Peercy, Prithviraj Banerjee

Proc. IEEE, 1993

Design and Evaluation of Gracefully Degradable Disk Arrays.

A. L. Narasimha Reddy, John A. Chandy, Prithviraj Banerjee

J. Parallel Distributed Comput., 1993

A Shared Memory Parallel Algorithm for Logic Synthesis.

Chieng-Fai Lim, Prithviraj Banerjee, Kaushik De, Saburo Muroga

Proceedings of the Sixth International Conference on VLSI Design, 1993

A Portable Parallel Algorithm for VLSI Circuit Extraction.

Balkrishna Ramkumar, Prithviraj Banerjee

Proceedings of the Seventh International Parallel Processing Symposium, 1993

PARADIGM: A Compiler for Automatic Data Distribution on Multicomputers.

Manish Gupta, Prithviraj Banerjee

Proceedings of the 7th international conference on Supercomputing, 1993

Automating Parallelization of Regular Computations for Distributed-Memory.

Ernesto Su, Daniel J. Palermo, Prithviraj Banerjee

Proceedings of the 1993 International Conference on Parallel Processing, 1993

A Fault-Tolerant Parallel Algorithm for Iterative Solution of the Laplace Equation.

Amber Roy-Chowdhury, Prithviraj Banerjee

Proceedings of the 1993 International Conference on Parallel Processing, 1993

Processor Allocation and Scheduling of Macro Dataflow Graphs on Distributed Memory Multicomputers by the PARADIGM Compiler.

Shankar Ramaswamy, Prithviraj Banerjee

Proceedings of the 1993 International Conference on Parallel Processing, 1993

Reliability Evalutaion of Disk Array Architectures.

John A. Chandy, Prithviraj Banerjee

Proceedings of the 1993 International Conference on Parallel Processing, 1993

Tolerance Determination for Algorithm-Based Checks Using Simplified Error Analysis Techniques.

Amber Roy-Chowdhury, Prithviraj Banerjee

Proceedings of the Digest of Papers: FTCS-23, 1993

Non-Scan Design-for-Testability Techniques for Sequential Circuits.

Vivek Chickermane, Elizabeth M. Rudnick, Prithviraj Banerjee, Janak H. Patel

Proceedings of the 30th Design Automation Conference. Dallas, 1993

A Survey of Parallel Algorithms for VLSI cell Placement.

Prithviraj Banerjee

Proceedings of the Algorithmic Aspects of VLSI Layout, 1993

1992

Performance Measurement and Trace Driven Simulation of Parallel CAD and Numeric Applications on a Hypercube Multicomputer.

Jiun-Ming Hsu, Prithviraj Banerjee

IEEE Trans. Parallel Distributed Syst., 1992

Demonstration of Automatic Data Partitioning Techniques for Parallelizing Compilers on Multicomputers.

Manish Gupta, Prithviraj Banerjee

IEEE Trans. Parallel Distributed Syst., 1992

Parallel Algorithms for Geometric Connected Component Labeling on a Hypercube Multiprocessor.

Krishna P. Belkhale, Prithviraj Banerjee

IEEE Trans. Computers, 1992

Reconfiguration Strategies for VLSI Processor Arrays and Trees Using a Modified Diogenes Approach.

Krishna P. Belkhale, Prithviraj Banerjee

IEEE Trans. Computers, 1992

Compile-Time Estimation of Communication Costs on Multicomputers.

Manish Gupta, Prithviraj Banerjee

Proceedings of the 6th International Parallel Processing Symposium, 1992

A methodology for high-level synthesis of communication on multicomputers.

Manish Gupta, Prithviraj Banerjee

Proceedings of the 6th international conference on Supercomputing, 1992

Low Cost Concurrent Error Detection in a VLIW Architecture Using Replicated Instructions.

John G. Holm, Prithviraj Banerjee

Proceedings of the 1992 International Conference on Parallel Processing, 1992

Portable parallel test generation for sequential circuits.

Balkrishna Ramkumar, Prithviraj Banerjee

Proceedings of the 1992 IEEE/ACM International Conference on Computer-Aided Design, 1992

ProperSYN: a portable parallel algorithm for logic synthesis.

Kaushik De, Balkrishna Ramkumar, Prithviraj Banerjee

Proceedings of the 1992 IEEE/ACM International Conference on Computer-Aided Design, 1992

Design and Analysis of Software Reconfiguration Strategies for Hypercube Multicomputers under Multiple Faults.

Michael Peercy, Prithviraj Banerjee

Proceedings of the Digest of Papers: FTCS-22, 1992

APT: An Area-Performance-Testability Driven Placement Algorithm.

Sungho Kim, Prithviraj Banerjee, Vivek Chickermane, Janak H. Patel

Proceedings of the 29th Design Automation Conference, 1992

1991

Performance trade-offs in a parallel test generation/fault simulation environment.

Srinivas Patil, Prithviraj Banerjee

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1991

Empirical and theoretical studies of the simulated evolution method applied to standard cell placement.

Ralph-Michael Kling, Prithviraj Banerjee

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1991

Parallel algorithms for VLSI circuit extraction.

Krishna P. Belkhale, Prithviraj Banerjee

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1991

A Layout Driven Design for Testability Technique for MOS VLSI Circuits.

Sungho Kim, Prithviraj Banerjee, Srinivas Patil

Proceedings of the Proceedings IEEE International Test Conference 1991, 1991

Logic Partitioning and Resynthesis for Testability.

Kaushik De, Prithviraj Banerjee

Proceedings of the Proceedings IEEE International Test Conference 1991, 1991

A Scheduling Algorithm for Parallelizable Dependent Tasks.

Krishna P. Belkhale, Prithviraj Banerjee

Proceedings of the Fifth International Parallel Processing Symposium, Proceedings, Anaheim, California, USA, April 30, 1991

Compiler Support for Parallel I/O Operations.

A. L. Narasimha Reddy, Prithviraj Banerjee, D. K. Chen

Proceedings of the International Conference on Parallel Processing, 1991

Performance Evaluation of Hardware Support for Message Passing in Distributed Memory Multicomputers.

Jiun-Ming Hsu, Prithviraj Banerjee

Proceedings of the International Conference on Parallel Processing, 1991

CRAFT: Compiler-Assisted Algorithm-Based Fault Tolerance in Distributed Memory Multiprocessors.

Vijay Balasubramanian, Prithviraj Banerjee

Proceedings of the International Conference on Parallel Processing, 1991

Gracefully Degradable Disk Arrays.

A. L. Narasimha Reddy, Prithviraj Banerjee

Proceedings of the 1991 International Symposium on Fault-Tolerant Computing, 1991

Functional abstraction of logic gates for switch-level simulation.

David T. Blaauw, Daniel G. Saab, Prithviraj Banerjee, Jacob A. Abraham

Proceedings of the conference on European design automation, 1991

Parallel Test Generation for Sequential Circuits on General-Purpose Multiprocessors.

Srinivas Patil, Prithviraj Banerjee, Janak H. Patel

Proceedings of the 28th Design Automation Conference, 1991

1990

Tradeoffs in the Design of Efficient Algorithm-Based Error Detection Schemes for Hypercube Multiprocessors.

Vijay Balasubramanian, Prithviraj Banerjee

IEEE Trans. Software Eng., 1990

Design, Analysis, and Simulation of I/O Architectures for Hypercube.

A. L. Narasimha Reddy, Prithviraj Banerjee

IEEE Trans. Parallel Distributed Syst., 1990

Parallel Simulated Annealing Algorithms for Cell Placement on Hypercube Multiprocessors.

Prithviraj Banerjee, Mark Howard Jones, Jeff S. Sargent

IEEE Trans. Parallel Distributed Syst., 1990

A parallel branch and bound algorithm for test generation.

Srinivas Patil, Prithviraj Banerjee

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1990

Algorithms-Based Fault Detection for Signal Processing Applications.

A. L. Narasimha Reddy, Prithviraj Banerjee

IEEE Trans. Computers, 1990

Algorithm-Based Fault Tolerance on a Hypercube Multiprocessor.

Prithviraj Banerjee, Joseph T. Rahmeh, Craig B. Stunkel, V. S. S. Nair, Kaushik Roy, Vijay Balasubramanian, Jacob A. Abraham

IEEE Trans. Computers, 1990

Compiler-Assisted Synthesis of Algorithm-Based Checking in Multiprocessors.

Vijay Balasubramanian, Prithviraj Banerjee

IEEE Trans. Computers, 1990

A message passing coprocessor for distributed memory multicomputers.

Jiun-Ming Hsu, Prithviraj Banerjee

Proceedings of the Proceedings Supercomputing '90, New York, NY, USA, November 12-16, 1990, 1990

A Study of I/O Behavior of Perfect Benchmarks on a Multiprocessor.

A. L. Narasimha Reddy, Prithviraj Banerjee

Proceedings of the 17th Annual International Symposium on Computer Architecture, 1990

Hardware Support for Message Routing in a Distributed Memory Multicomputer.

Jiun-Ming Hsu, Prithviraj Banerjee

Proceedings of the 1990 International Conference on Parallel Processing, 1990

Geometric Connected Component Labeling on Distributed Memory Multicomputers.

Krishna P. Belkhale, Prithviraj Banerjee

Proceedings of the 1990 International Conference on Parallel Processing, 1990

An Approximate Algorithm for the Partitionable Independent Task Scheduling Problem.

Krishna P. Belkhale, Prithviraj Banerjee

Proceedings of the 1990 International Conference on Parallel Processing, 1990

Automatic classification of node types in switch-level descriptions.

David T. Blaauw, Prithviraj Banerjee, Jacob A. Abraham

Proceedings of the 1990 IEEE International Conference on Computer Design: VLSI in Computers and Processors, 1990

SNEL: A Switch-Level Simulator Using Multiple Levels of Functional Abstraction.

David T. Blaauw, Robert B. Mueller-Thuns, Daniel G. Saab, Prithviraj Banerjee, Jacob A. Abraham

Proceedings of the IEEE/ACM International Conference on Computer-Aided Design, 1990

A Parallel Algorithm for Hierarchical Circuit Extraction.

Krishna P. Belkhale, Prithviraj Banerjee

Proceedings of the IEEE/ACM International Conference on Computer-Aided Design, 1990

Distributed algorithms for shortest-path, deadlock-free routing and broadcasting in arbitrarily faulty hypercubes.

Michael Peercy, Prithviraj Banerjee

Proceedings of the 20th International Symposium on Fault-Tolerant Computing, 1990

Strategies for reconfiguring hypercubes under faults.

Prithviraj Banerjee

Proceedings of the 20th International Symposium on Fault-Tolerant Computing, 1990

Optimization by Simulated Evolution with Applications to Standard Cell Placement.

Ralph-Michael Kling, Prithviraj Banerjee

Proceedings of the 27th ACM/IEEE Design Automation Conference. Orlando, 1990

PHIGURE: A Parallel Hierarchical Global Router.

Randall J. Brouwer, Prithviraj Banerjee

Proceedings of the 27th ACM/IEEE Design Automation Conference. Orlando, 1990

1989

ESp: Placement by simulated evolution.

Ralph-Michael Kling, Prithviraj Banerjee

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1989

An Evaluation of Multiple-Disk I/O Systems.

A. L. Narasimha Reddy, Prithviraj Banerjee

IEEE Trans. Computers, 1989

The Design, Analysis and Simulation of a Fault-Tolerant Interconnection Network Supporting the Fetch-and-Add Primitive.

Prithviraj Banerjee, Abhijeet Dugar

IEEE Trans. Computers, 1989

A study parallel disk organizations.

A. L. Narasimha Reddy, Prithviraj Banerjee

SIGARCH Comput. Archit. News, 1989

Efficient circuit partitioning algorithms for parallel logic simulation.

Srinivas Patil, Prithviraj Banerjee, Constantine D. Polychronopoulos

Proceedings of the Proceedings Supercomputing '89, Reno, NV, USA, November 12-17, 1989, 1989

Algorithm-based Error Detection for Signal Processing Applications on a Hypercube Multiprocessor.

Vijay Balasubramanian, Prithviraj Banerjee

Proceedings of the Real-Time Systems Symposium, 1989

Fault Partitioning Issues in an Integrated Parallel Test Generation/Fault Simulation Environment.

Srinivas Patil, Prithviraj Banerjee

Proceedings of the Proceedings International Test Conference 1989, 1989

I/O issues for hypercubes.

A. L. Narasimha Reddy, Prithviraj Banerjee

Proceedings of the 3rd international conference on Supercomputing, 1989

Performance Evaluation of Multiple-Disk I/O Systems.

A. L. Narasimha Reddy, Prithviraj Banerjee

Proceedings of the International Conference on Parallel Processing, 1989

Algorithm-Based Fault Tolerance for Adaptive Least Squares Lattice Filtering on a Hypercube Multiprocessor.

Robert B. Mueller-Thuns, David McFarland, Prithviraj Banerjee

Proceedings of the International Conference on Parallel Processing, 1989

An accurate timing model for fault simulation in MOS circuits.

Sungho Kim, Prithviraj Banerjee

Proceedings of the 1989 IEEE International Conference on Computer-Aided Design, 1989

PACE2: an improved parallel VLSI extractor with parameter extraction.

Krishna P. Belkhale, Prithviraj Banerjee

Proceedings of the 1989 IEEE International Conference on Computer-Aided Design, 1989

A Parallel Row-based Algorithm for Standard Cell Placement with Integrated Error Control.

Jeff S. Sargent, Prithviraj Banerjee

Proceedings of the 26th ACM/IEEE Design Automation Conference, 1989

1988

On the Construction of Communication Networks Satisfying Bounded Fan-In of Service Ports.

Douglas B. West, Prithviraj Banerjee

IEEE Trans. Computers, 1988

The Cubical Ring Connected Cycles: A Fault-Tolerant Parallel Computation Network.

Prithviraj Banerjee

IEEE Trans. Computers, 1988

I/O Embedding in Hypercubes.

A. L. Narasimha Reddy, Prithviraj Banerjee

Proceedings of the International Conference on Parallel Processing, 1988

A parallel simulated annealing algorithm for channel routing on a hypercube multiprocessor.

Randall J. Brouwer, Prithviraj Banerjee

Proceedings of the Computer Design: VLSI in Computers and Processors, 1988

Reconfiguration strategies in VLSI processor arrays.

Krishna P. Belkhale, Prith Banerjee

Proceedings of the Computer Design: VLSI in Computers and Processors, 1988

PACE: a parallel VLSI extractor on the Intel hypercube multiprocessor.

Krishna P. Belkhale, Prithviraj Banerjee

Proceedings of the 1988 IEEE International Conference on Computer-Aided Design, 1988

An evaluation of system-level fault tolerance on the Intel hypercube multiprocessor.

Prithviraj Banerjee, Joseph T. Rahmeh, Craig B. Stunkel, V. S. S. Nair, Kaushik Roy, Jacob A. Abraham

Proceedings of the Eighteenth International Symposium on Fault-Tolerant Computing, 1988

A novel approach to system-level fault tolerance in hypercube multiprocessors.

Prithviraj Banerjee, Craig B. Stunkel

Proceedings of the Third Conference on Hypercube Concurrent Computers and Applications, 1988

1987

A Fault Tolerant Massively Parallel Processing Architecture.

Vijay Balasubramanian, Prithviraj Banerjee

J. Parallel Distributed Comput., 1987

Fault Tolerance Techniques for Systolic Arrays.

Jacob A. Abraham, Prithviraj Banerjee, Chien-Yi Chen, W. Kent Fuchs, Sy-Yen Kuo, A. L. Narasimha Reddy

Computer, 1987

A Fixed Size Array Processor for Computing the Fast Fourier Transform.

Vijay Balasubramanian, Prithviraj Banerjee

Proceedings of the 8th IEEE Real-Time Systems Symposium (RTSS '87), 1987

A Fault Secure Dictionary Machine.

A. L. Narasimha Reddy, Prithviraj Banerjee

Proceedings of the Third International Conference on Data Engineering, 1987

ESP: A New Standard Cell Placement Package Using Simulated Evolution.

Ralph-Michael Kling, Prithviraj Banerjee

Proceedings of the 24th ACM/IEEE Design Automation Conference. Miami Beach, FL, USA, June 28, 1987

Performance of a Parallel Algorithm for Standard Cell Placement on the Intel Hypercube.

Mark Jones, Prithviraj Banerjee

Proceedings of the 24th ACM/IEEE Design Automation Conference. Miami Beach, FL, USA, June 28, 1987

1986

Bounds on Algorithm-Based Fault Tolerance in Multiple Processor Systems.

Prithviraj Banerjee, Jacob A. Abraham

IEEE Trans. Computers, 1986

A Probabilistic Model of Algorithm-Based Fault Tolerance in Array Processors for Real-Time Systems.

Prithviraj Banerjee, Jacob A. Abraham

Proceedings of the 7th IEEE Real-Time Systems Symposium (RTSS '86), 1986

A Fault-Tolerant Interconnection Network Supporting the Fetch-And-Add Primitive.

Prithviraj Banerjee, Abhijeet Dugar

Proceedings of the International Conference on Parallel Processing, 1986

RECBAR : A Reconfigurable Massively Parallel Processing Architecture.

Vijay Balasubramanian, Prithviraj Banerjee

Proceedings of the International Conference on Parallel Processing, 1986

1985

A Theory for Algorithm-Based Fault Tolerance in Array Processor Systems

Prithviraj Banerjee

PhD thesis, 1985

A Multivalued Algebra For Modeling Physical Failures in MOS VLSI Circuits.

Prithviraj Banerjee, Jacob A. Abraham

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1985

1984

Characterization and Testing of Physical Failures in MOS Logic Circuits.

Prithviraj Banerjee, Jacob A. Abraham

IEEE Des. Test, 1984

Fault-Secure Algorithms for Multiple-Processor Systems.

Prithviraj Banerjee, Jacob A. Abraham

Proceedings of the 11th Annual Symposium on Computer Architecture, 1984

1983

Generating Tests for Physical Failures in MOS Logic Circuits.

Prithviraj Banerjee, Jacob A. Abraham

Proceedings of the Proceedings International Test Conference 1983, 1983