Prithayan Barua

According to our database1, Prithayan Barua authored at least 9 papers between 2010 and 2022.

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Bibliography

2022
Memory access scheduling to reduce thread migrations.
Proceedings of the CC '22: 31st ACM SIGPLAN International Conference on Compiler Construction, Seoul, South Korea, April 2, 2022

2021
Compiler Analysis And Optimization of Memory Management In Modern Processors.
PhD thesis, 2021

2020
BlankIt library debloating: getting what you want instead of cutting what you don't.
Proceedings of the 41st ACM SIGPLAN International Conference on Programming Language Design and Implementation, 2020

OmpMemOpt: Optimized Memory Movement for Heterogeneous Computing.
Proceedings of the Euro-Par 2020: Parallel Processing, 2020

2019
Binary Debloating for Security via Demand Driven Loading.
CoRR, 2019

OMPSan: Static Verification of OpenMP's Data Mapping Constructs.
Proceedings of the OpenMP: Conquering the Full Hardware Spectrum, 2019

T2S-Tensor: Productively Generating High-Performance Spatial Hardware for Dense Tensor Computations.
Proceedings of the 27th IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2019

2018
Cost-driven thread coarsening for GPU kernels.
Proceedings of the 27th International Conference on Parallel Architectures and Compilation Techniques, 2018

2010
A Cryptosystem for Encryption and Decryption of Long Confidential Messages.
Proceedings of the Information Security and Assurance - 4th International Conference, 2010


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