Pritesh Kumar Yadav

Orcid: 0000-0002-4538-1834

According to our database1, Pritesh Kumar Yadav authored at least 4 papers between 2020 and 2022.

Collaborative distances:
  • Dijkstra number2 of six.
  • Erdős number3 of five.

Timeline

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PhD thesis 
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Links

On csauthors.net:

Bibliography

2022
A Differential LNA Architecture with Improved Figure of Merit Using 40 nm UMC CMOS Technology for mmWave Band Receiver Applications.
Wirel. Pers. Commun., 2022

2021
A Proposed Technique to Improve the Performance of Receiver by Using Linear Gm-C Low-Pass Filter for mmwave Band Applications.
J. Circuits Syst. Comput., 2021

2020
Design of Transceiver at 865-867 MHz Band using UMC 180 nm CMOS Technology.
Proceedings of the 2020 24th International Symposium on VLSI Design and Test (VDAT), 2020

A 60 GHz, 50 mW, 3dB Noise Figure Receiver Frontend Using UMC 40 nm CMOS technology.
Proceedings of the IEEE International Symposium on Smart Electronic Systems, 2020


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