Premkishore Shivakumar

According to our database, Premkishore Shivakumar authored at least 6 papers between 2002 and 2007.

Collaborative distances:

• Dijkstra number of three.
• Erdős number of four.

2007

On-Chip Interconnection Networks of the TRIPS Chip.

Paul Gratz, Changkyu Kim, Karthikeyan Sankaralingam, Heather Hanson, Premkishore Shivakumar, Stephen W. Keckler, Doug Burger

IEEE Micro, 2007

Implementation and Evaluation of a Dynamically Routed Processor Operand Network.

Paul Gratz, Karthikeyan Sankaralingam, Heather Hanson, Premkishore Shivakumar, Robert G. McDonald, Stephen W. Keckler, Doug Burger

Proceedings of the First International Symposium on Networks-on-Chips, 2007

2006

Distributed Microarchitectural Protocols in the TRIPS Prototype Processor.

Karthikeyan Sankaralingam, Ramadass Nagarajan, Robert G. McDonald, Rajagopalan Desikan, Saurabh Drolia, M. S. Govindan, Paul Gratz, Divya Gulati, Heather Hanson, Changkyu Kim, Haiming Liu, Nitya Ranganathan, Simha Sethumadhavan, Sadia Sharif, Premkishore Shivakumar, Stephen W. Keckler, Doug Burger

Proceedings of the 39th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO-39 2006), 2006

2003

Exploiting Microarchitectural Redundancy For Defect Tolerance.

Premkishore Shivakumar, Stephen W. Keckler, Charles R. Moore, Doug Burger

Proceedings of the 21st International Conference on Computer Design (ICCD 2003), 2003

2002

The Optimal Logic Depth Per Pipeline Stage is 6 to 8 FO4 Inverter Delays.

M. S. Hrishikesh, Doug Burger, Stephen W. Keckler, Premkishore Shivakumar, Norman P. Jouppi, Keith I. Farkas

Proceedings of the 29th International Symposium on Computer Architecture (ISCA 2002), 2002

Modeling the Effect of Technology Trends on the Soft Error Rate of Combinational Logic.

Premkishore Shivakumar, Michael Kistler, Stephen W. Keckler, Doug Burger, Lorenzo Alvisi

Proceedings of the 2002 International Conference on Dependable Systems and Networks (DSN 2002), 2002