Prayag Patel
According to our database1,
Prayag Patel
authored at least 3 papers
between 2012 and 2013.
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Bibliography
2013
Experiments and analysis to characterize logic state retention limitations in 28nm process node.
Proceedings of the 31st IEEE VLSI Test Symposium, 2013
Analysis, modeling and silicon correlation of low-voltage flop data retention in 28nm process technology.
Proceedings of the International Symposium on Quality Electronic Design, 2013
2012
Proceedings of the IEEE International Conference on IC Design & Technology, 2012