Praveen Kumar Kasetty
Orcid: 0000-0003-4335-8785
According to our database1,
Praveen Kumar Kasetty
authored at least 4 papers
between 2020 and 2024.
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Bibliography
2024
A two stage pipeline architecture for hardware implementation of multi-level decomposition of 1-D framelet transform.
Microprocess. Microsystems, 2024
2023
An Adaptive Embedding Approach for High Imperceptible and Robust Audio Watermarking Using Framelet Transform and SVD.
Circuits Syst. Signal Process., 2023
2022
FPGA architecture to perform symmetric extension on signals for handling border discontinuities in FIR filtering.
Comput. Electr. Eng., 2022
2020
Proceedings of the 11th International Conference on Computing, 2020