Pratik B. Vyas

According to our database1, Pratik B. Vyas authored at least 4 papers between 2021 and 2024.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

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Article 
PhD thesis 
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Links

On csauthors.net:

Bibliography

2024

Material, Process and System Level Analysis for Parasitic Reduction of Next Generation Logic Technology in Conjunction with Backside Power Delivery.
Proceedings of the IEEE Symposium on VLSI Technology and Circuits 2024, 2024

Gate-All-Around SRAM: Performance Investigation and Optimization Towards Vccmin Scaling.
Proceedings of the IEEE International Memory Workshop, 2024

2021
Reliability-Conscious MOSFET Compact Modeling with Focus on the Defect-Screening Effect of Hot-Carrier Injection.
Proceedings of the IEEE International Reliability Physics Symposium, 2021


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