Prateek Sikka
Orcid: 0000-0002-0941-5101
According to our database1,
Prateek Sikka
authored at least 8 papers
between 2018 and 2022.
Collaborative distances:
Collaborative distances:
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Bibliography
2022
Int. J. Cooperative Inf. Syst., December, 2022
Area, Speed and Power Optimized Implementation of a Band-Pass FIR Filter Using High-Level Synthesis.
Wirel. Pers. Commun., 2022
2021
Real time FPGA implementation of a high speed and area optimized Harris corner detection algorithm.
Microprocess. Microsystems, 2021
Power- and Area-Optimized High-Level Synthesis Implementation of a Digital Down Converter for Software-Defined Radio Applications.
Circuits Syst. Signal Process., 2021
High-speed and area-efficient Sobel edge detector on field-programmable gate array for artificial intelligence and machine learning applications.
Comput. Intell., 2021
2020
Speed optimal FPGA implementation of the encryption algorithms for telecom applications.
Microprocess. Microsystems, 2020
High-Level synthesis assisted design and verification framework for automotive radar processors.
Microprocess. Microsystems, 2020
2018
Design and Implementation of Power Optimized Dual Core and Single Core DLX Processor on FPGA.
Proceedings of the 9th International Conference on Computing, 2018