Prashansa Mukim

Orcid: 0000-0002-1150-1826

According to our database1, Prashansa Mukim authored at least 10 papers between 2017 and 2024.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2024
Automated and Holistic Co-design of Neural Networks and ASICs for Enabling In-Pixel Intelligence.
CoRR, 2024

2022
Associative memories using complex-valued Hopfield networks based on spin-torque oscillator arrays.
Neuromorph. Comput. Eng., 2022

2021
Multiwire Phase Encoding: A Signaling Strategy for High-Bandwidth, Low-Power Data Movement.
IEEE Trans. Very Large Scale Integr. Syst., 2021

2020
Analysis and Design of Precision Timing Circuits using Pulse Mode Event Signaling
PhD thesis, 2020

Design and Analysis of Collective Pulse Oscillators.
IEEE Trans. Very Large Scale Integr. Syst., 2020

2019
Distributed Pulse Rotary Traveling Wave VCO: Architecture and Design.
Proceedings of the 2019 IEEE Computer Society Annual Symposium on VLSI, 2019

2018
Impact of Variations on Synchronizer Performance: An Experimental Study.
Proceedings of the 31st International Conference on VLSI Design and 17th International Conference on Embedded Systems, 2018

Impolite High Speed Interfaces with Asynchronous Pulse Logic.
Proceedings of the 2018 on Great Lakes Symposium on VLSI, 2018

Cost-efficient 3D Integration to Hinder Reverse Engineering During and After Manufacturing.
Proceedings of the Asian Hardware Oriented Security and Trust Symposium, 2018

2017
Low phase noise pulse rotary wave voltage controlled oscillator.
Proceedings of the International SoC Design Conference, 2017


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