Prasanti Uppaluri

According to our database, Prasanti Uppaluri authored at least 4 papers between 1993 and 1996.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

1996

On minimizing the number of test points needed to achieve complete robust path delay fault testability.

Prasanti Uppaluri, Uwe Sparmann, Irith Pomeranz

Proceedings of the 14th IEEE VLSI Test Symposium (VTS'96), April 28, 1996

1995

NEST: a nonenumerative test generation method for path delay faults in combinational circuits.

Irith Pomeranz, Sudhakar M. Reddy, Prasanti Uppaluri

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1995

1994

Test Pattern Generation for Path Delay Faults in Synchronous Sequential Circuits Using Multiple Fast Clocks and Multiple Observations Times.

Prasanti Uppaluri, Irith Pomeranz, Sudhakar M. Reddy

Proceedings of the Digest of Papers: FTCS/24, 1994

1993

NEST: A Non-Enumerative Test Generation Method for Path Delay Faults in Combinational Circuits.

Irith Pomeranz, Sudhakar M. Reddy, Prasanti Uppaluri

Proceedings of the 30th Design Automation Conference. Dallas, 1993