Prasanth Mangalagiri

According to our database, Prasanth Mangalagiri authored at least 12 papers between 2006 and 2024.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2024

CDLS: Constraint Driven Generative AI Framework for Analog Layout Synthesis.

Prasanth Mangalagiri, Lynn Qian, Farrukh Zafar, Praveen Mosalikanti, Phoebe Chang, Arun Kurian, Vinay Saripalli

Proceedings of the 61st ACM/IEEE Design Automation Conference, 2024

2019

Analog Layout Synthesis: Are We There Yet?

Prasanth Mangalagiri

Proceedings of the 2019 International Symposium on Physical Design, 2019

2009

An Automated Framework for Accelerating Numerical Algorithms on Reconfigurable Platforms Using Algorithmic/Architectural Optimization.

Jungsub Kim, Lanping Deng, Prasanth Mangalagiri, Kevin M. Irick, Kanwaldeep Sobti, Mahmut T. Kandemir, Vijaykrishnan Narayanan, Chaitali Chakrabarti, Nikos Pitsianis, Xiaobai Sun

IEEE Trans. Computers, 2009

Lifetime Reliability Aware Design Flow Techniques for Dual-Vdd Based Platform FPGAs.

Prasanth Mangalagiri, Vijaykrishnan Narayanan

Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2009

Exploiting clock skew scheduling for FPGA.

Sungmin Bae, Prasanth Mangalagiri, Narayanan Vijaykrishnan

Proceedings of the Design, Automation and Test in Europe, 2009

2008

Toward Increasing FPGA Lifetime.

Suresh Srinivasan, Krishnan Ramakrishnan, Prasanth Mangalagiri, Yuan Xie, Vijaykrishnan Narayanan, Mary Jane Irwin, Karthik Sarpatwari

IEEE Trans. Dependable Secur. Comput., 2008

Thermal-aware reliability analysis for platform FPGAs.

Prasanth Mangalagiri, Sungmin Bae, Krishnan Ramakrishnan, Yuan Xie, Vijaykrishnan Narayanan

Proceedings of the 2008 International Conference on Computer-Aided Design, 2008

A low-power phase change memory based hybrid cache architecture.

Prasanth Mangalagiri, Karthik Sarpatwari, Aditya Yanamandra, Vijaykrishnan Narayanan, Yuan Xie, Mary Jane Irwin, Osama Awadel Karim

Proceedings of the 18th ACM Great Lakes Symposium on VLSI 2008, 2008

2007

Efficient Function Evaluations with Lookup Tables for Structured Matrix Operations.

Kanwaldeep Sobti, Lanping Deng, Chaitali Chakrabarti, Nikos Pitsianis, Xiaobai Sun, Jungsub Kim, Prasanth Mangalagiri, Kevin M. Irick, Mahmut T. Kandemir, Vijaykrishnan Narayanan

Proceedings of the IEEE Workshop on Signal Processing Systems, 2007

FPGA routing architecture analysis under variations.

Suresh Srinivasan, Prasanth Mangalagiri, Yuan Xie, Narayanan Vijaykrishnan

Proceedings of the 25th International Conference on Computer Design, 2007

TANOR: A Tool for Accelerating N-Body Simulations on Reconfigurable Platforms.

Jungsub Kim, Prasanth Mangalagiri, Kevin M. Irick, Mahmut T. Kandemir, Vijaykrishnan Narayanan, Kanwaldeep Sobti, Lanping Deng, Chaitali Chakrabarti, Nikos Pitsianis, Xiaobai Sun

Proceedings of the FPL 2007, 2007

2006

FLAW: FPGA lifetime awareness.

Suresh Srinivasan, Prasanth Mangalagiri, Yuan Xie, Narayanan Vijaykrishnan, Karthik Sarpatwari

Proceedings of the 43rd Design Automation Conference, 2006