Prasanna Kumar Misra

Orcid: 0000-0003-4942-1335

According to our database1, Prasanna Kumar Misra authored at least 20 papers between 2014 and 2023.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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Bibliography

2023
An 8T PA Attack Resilient NVSRAM for In-Memory-Computing Applications.
IEEE Trans. Circuits Syst. I Regul. Pap., September, 2023

Design and Analysis of Low-Voltage, MOS-only Bandgap Reference Circuit.
Proceedings of the IEEE International Symposium on Smart Electronic Systems, 2023

2022
A Differential LNA Architecture with Improved Figure of Merit Using 40 nm UMC CMOS Technology for mmWave Band Receiver Applications.
Wirel. Pers. Commun., 2022

An Energy Efficient, Mismatch Tolerant Offset Compensating Hybrid MTJ/CMOS Magnetic Full Adder.
IEEE Trans. Circuits Syst. II Express Briefs, 2022

Design of Hexagonal Oscillator for True Random Number Generation.
Proceedings of the 29th IEEE International Conference on Electronics, Circuits and Systems, 2022

2021
Design of Ultra-Low Power High-Q Single Ended Active Inductors for IF BPF of Receiver Frontend Using 130 nm BiCMOS Technology.
Wirel. Pers. Commun., 2021

A Proposed Technique to Improve the Performance of Receiver by Using Linear Gm-C Low-Pass Filter for mmwave Band Applications.
J. Circuits Syst. Comput., 2021

Design and Analysis of SRAM Cell using Negative Bit-Line Write Assist Technique and Separate Read Port for High-Speed Applications.
J. Circuits Syst. Comput., 2021

Design of True Random Number Generator Using Fingerprint as an Entropy Source and Its Implementation in S-Box.
J. Circuits Syst. Comput., 2021

Design and Analysis of SRAM cell using Body Bias Controller for Low Power Applications.
Circuits Syst. Signal Process., 2021

2020
0.4 mW, 0.27 pJ/bit true random number generator using jitter, metastability and current starved topology.
IET Circuits Devices Syst., 2020

Design of Transceiver at 865-867 MHz Band using UMC 180 nm CMOS Technology.
Proceedings of the 2020 24th International Symposium on VLSI Design and Test (VDAT), 2020

Opto-Radio Noise based True Random Number Generator.
Proceedings of the 2020 24th International Symposium on VLSI Design and Test (VDAT), 2020

A 60 GHz, 50 mW, 3dB Noise Figure Receiver Frontend Using UMC 40 nm CMOS technology.
Proceedings of the IEEE International Symposium on Smart Electronic Systems, 2020

Design of SRAM cell using Voltage Lowering and Stacking Techniques for Low Power Applications.
Proceedings of the 2020 IEEE Asia Pacific Conference on Circuits and Systems, 2020

2018
A 2.4 GHz Low Power Low Phase-Noise Enhanced FOM VCO for RF Applications Using 180 nm CMOS Technology.
Wirel. Pers. Commun., 2018

A 40nm Low Power High Stable SRAM Cell Using Separate Read Port and Sleep Transistor Methodology.
Proceedings of the IEEE International Symposium on Smart Electronic Systems, 2018

Modified Tent Map Based Design for True Random Number Generator.
Proceedings of the IEEE International Symposium on Smart Electronic Systems, 2018

Analysis of modulation schemes for Bluetooth-LE module for Internet-of-Things (IoT) applications.
Proceedings of the IEEE International Conference on Consumer Electronics, 2018

2014
Impact of Collector Length on the Performance of NPN SiGe HBT on Thin Film SOI.
J. Low Power Electron., 2014


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