Prasad R. Chalasani

According to our database, Prasad R. Chalasani authored at least 5 papers between 1989 and 1995.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

1995

Parallel computing for network optimization: a cluster-based approach for the dual transshipment problem.

Prasad R. Chalasani, Krishnaiyan Thulasiraman

Proceedings of the Seventh IEEE Symposium on Parallel and Distributed Processing, 1995

1994

Integrated VLSI layout compaction and wire balancing on a shared memory multiprocessor: evaluation of a parallel algorithm.

Prasad R. Chalasani, Krishnaiyan Thulasiraman, M. A. Corneau

Proceedings of the International Symposium on Parallel Architectures, 1994

1993

Parallel Network Primal-Dual Method on a Shared Memory Multiprocessor and a Unified Approach to VLSI Layout Compaction and Wire Balancing.

Krishnaiyan Thulasiraman, Prasad R. Chalasani, Parimala Thulasiraman, M. A. Comeau

Proceedings of the Sixth International Conference on VLSI Design, 1993

Parallel Network Dual Simplex Method on a Shared Memory Multiprocessor.

Krishnaiyan Thulasiraman, Prasad R. Chalasani, M. A. Comeau

Proceedings of the Fifth IEEE Symposium on Parallel and Distributed Processing, 1993

1989

Design of Testable VLSI Circuits with Minumum Area Overhead.

Prasad R. Chalasani, Sudipta Bhawmik, Anurag Acharya, Parimal Palchaudhuri

IEEE Trans. Computers, 1989