Pranesh Santikellur

According to our database, Pranesh Santikellur authored at least 11 papers between 2018 and 2023.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2023

Deep Learning for Computational Problems in Hardware Security - Modeling Attacks on Strong Physically Unclonable Function Circuits

Pranesh Santikellur, Rajat Subhra Chakraborty

Studies in Computational Intelligence 1052, Springer, ISBN: 978-981-19-4016-3, 2023

2022

Correlation Integral-Based Intrinsic Dimension: A Deep-Learning-Assisted Empirical Metric to Estimate the Robustness of Physically Unclonable Functions to Modeling Attacks.

Pranesh Santikellur, Rajat Subhra Chakraborty

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022

Hardware IP Protection Using Register Transfer Level Locking and Obfuscation of Control and Data Flow.

Pranesh Santikellur, Rajat Subhra Chakraborty, Swarup Bhunia

Behavioral Synthesis for Hardware Security, 2022

2021

A Conditionally Chaotic Physically Unclonable Function Design Framework with High Reliability.

Saranyu Chattopadhyay, Pranesh Santikellur, Rajat Subhra Chakraborty, Jimson Mathew, Marco Ottavi

ACM Trans. Design Autom. Electr. Syst., 2021

A Computationally Efficient Tensor Regression Network-Based Modeling Attack on XOR Arbiter PUF and Its Variants.

Pranesh Santikellur, Rajat Subhra Chakraborty

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2021

APUF-BNN: An Automated Framework for Efficient Combinational Logic Based Implementation of Arbiter PUF through Binarized Neural Network.

Pranesh Santikellur, Rijoy Mukherjee, Rajat Subhra Chakraborty

Proceedings of the GLSVLSI '21: Great Lakes Symposium on VLSI 2021, 2021

2019

Deep Learning based Model Building Attacks on Arbiter PUF Compositions.

Pranesh Santikellur, Aritra Bhattacharyay, Rajat Subhra Chakraborty

IACR Cryptol. ePrint Arch., 2019

United We Stand: A Threshold Signature Scheme for Identifying Outliers in PLCs.

Urbi Chatterjee, Pranesh Santikellur, Rajat Sadhukhan, Vidya Govindan, Debdeep Mukhopadhyay, Rajat Subhra Chakraborty

Proceedings of the 56th Annual Design Automation Conference 2019, 2019

A Computationally Efficient Tensor Regression Network based Modeling Attack on XOR APUF.

Pranesh Santikellur, Lakshya, Shashi Ranjan Prakash, Rajat Subhra Chakraborty

Proceedings of the Asian Hardware Oriented Security and Trust Symposium, 2019

Design of a Chaotic Oscillator based Model Building Attack Resistant Arbiter PUF.

Venkata Sreekanth Balijabudda, Dhruv Thapar, Pranesh Santikellur, Rajat Subhra Chakraborty, Indrajit Chakrabarti

Proceedings of the Asian Hardware Oriented Security and Trust Symposium, 2019

2018

A Hardware Trojan Attack on FPGA-Based Cryptographic Key Generation: Impact and Detection.

Vidya Govindan, Rajat Subhra Chakraborty, Pranesh Santikellur, Aditya Kumar Chaudhary

J. Hardw. Syst. Secur., 2018