Pranav O. Mathews

Orcid: 0000-0002-2818-9410

According to our database1, Pranav O. Mathews authored at least 7 papers between 2021 and 2024.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

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Bibliography

2024
A 65 nm CMOS Analog Programmable Standard Cell Library for Mixed-Signal Computing.
IEEE Trans. Very Large Scale Integr. Syst., October, 2024

Hopfield vs Ising: A Comparison on the SoC FPAA.
IEEE Trans. Circuits Syst. I Regul. Pap., September, 2024

A 130nm CMOS Programmable Analog Standard Cell Library.
IEEE Trans. Circuits Syst. I Regul. Pap., June, 2024

A 65nm and 130nm CMOS Programmable Analog Standard Cell Library for Scalable System Synthesis.
Proceedings of the IEEE Custom Integrated Circuits Conference, 2024

2023
Toward Biorealistic Silicon Neural Circuits on Reconfigurable Platforms.
Proceedings of the 66th IEEE International Midwest Symposium on Circuits and Systems, 2023

Physical Computing for Hopfield Networks on a Reconfigurable Analog IC.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2023

2021
High-Speed CMOS-Free Purely Spintronic Asynchronous Recurrent Neural Network.
CoRR, 2021


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