Pramod Kumar Tiwari
Orcid: 0000-0001-5640-3747
According to our database1,
Pramod Kumar Tiwari
authored at least 13 papers
between 2010 and 2024.
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Bibliography
2024
Logic-in-memory application of silicon nanotube-based FBFET with core-source architecture.
Microelectron. J., 2024
2023
Impact of self-heating on thermal noise in In<sub>1-x</sub>Ga<sub>x</sub>As GAA MOSFETs.
Microelectron. J., 2023
Microelectron. J., 2023
Impact of Process-Induced Inclined Sidewalls On Small Signal Parameters of Silicon Nanowire GAA MOSFET.
Proceedings of the IEEE Region 10 Conference, 2023
2022
Subthreshold model of asymmetric GAA junctionless FETs with scaled equivalent oxide thickness.
Microelectron. J., 2022
2021
Genetic algorithm-based threshold voltage prediction of SOI JLT using multi-variable nonlinear regression.
Proceedings of the 4th International Symposium on Devices, Circuits and Systems, 2021
2019
IET Circuits Devices Syst., 2019
Analytical Modeling of Analog/RF Parameters for Trigate Junctionless Field Effect Transistor Incorporating Substrate Biasing Effects.
Proceedings of the TENCON 2019, 2019
Modeling of Drain Current and Analog Characteristics of Dual-Metal Quadruple Gate (DMQG) MOSFETs.
Proceedings of the IEEE International Symposium on Smart Electronic Systems, 2019
Temperature Dependence of Subthreshold Characteristics of Negative Capacitance Recessed-Source/Drain (NC R-S/D) SOI MOSFET.
Proceedings of the IEEE International Symposium on Smart Electronic Systems, 2019
Analytical Modeling of Subthreshold Current and Subthreshold Swing of Schottky-Barrier Source/Drain Double Gate-All-Around (DGAA) MOSFETs.
Proceedings of the IEEE International Symposium on Smart Electronic Systems, 2019
2011
An Analytical Drain Current Model for Short-Channel Triple-Material Double-Gate MOSFETs.
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2011
2010
IET Circuits Devices Syst., 2010