Prakash Narayanan
According to our database1,
Prakash Narayanan
authored at least 6 papers
between 2011 and 2021.
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Bibliography
2021
High-Performance and Small Form-Factor mm-Wave CMOS Radars for Automotive and Industrial Sensing in 76-to-81GHz and 57-to-64GHz Bands.
Proceedings of the IEEE International Solid-State Circuits Conference, 2021
2017
Proceedings of the 35th IEEE VLSI Test Symposium, 2017
2014
Novel self-test methods to reduce on-chip memory requirements and improved test coverage.
Proceedings of the 2014 IEEE 20th International On-Line Testing Symposium, 2014
2011
Modified flip-flop architecture to reduce hold buffers and peak power during scan shift operation.
Proceedings of the 29th IEEE VLSI Test Symposium, 2011
DFT for extremely low cost test of mixed signal SOCs with integrated RF and power management.
Proceedings of the 2011 IEEE International Test Conference, 2011
Circuit and DFT techniques for robust and low cost qualification of a mixed-signal SoC with integrated power management system.
Proceedings of the Design, Automation and Test in Europe, 2011